main.elf: file format elf32-littlearm Disassembly of section .text: 08000000 : 8000000: 00 00 01 20 49 02 00 08 00 00 00 00 00 00 00 00 ... I........... 8000010: 81 02 00 08 81 02 00 08 81 02 00 08 00 00 00 00 ................ ... 800002c: 81 02 00 08 81 02 00 08 00 00 00 00 81 02 00 08 ................ 800003c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800004c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800005c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800006c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800007c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800008c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800009c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 80000ac: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 80000bc: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 80000cc: 81 02 00 08 81 02 00 08 7d 17 00 08 81 02 00 08 ........}....... 80000dc: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 80000ec: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 80000fc: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800010c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800011c: 81 02 00 08 81 02 00 08 81 02 00 08 81 02 00 08 ................ 800012c: 81 02 00 08 00 00 00 00 00 00 00 00 00 00 00 00 ................ ... 80001dc: 5f f8 e0 f1 _... 080001e0 <__Init_Data>: 0, 0, 0, 0, 0, 0, 0, 0, (intfunc)0xF1E0F85F /* @0x1E0. This is for boot in RAM mode for STM32F10x High Density devices. */ }; void __Init_Data(void) { 80001e0: b480 push {r7} 80001e2: b083 sub sp, #12 80001e4: af00 add r7, sp, #0 unsigned long *src, *dst; /* copy the data segment into ram */ src = &_sidata; 80001e6: 4b13 ldr r3, [pc, #76] @ (8000234 <__Init_Data+0x54>) 80001e8: 607b str r3, [r7, #4] dst = &_sdata; 80001ea: 4b13 ldr r3, [pc, #76] @ (8000238 <__Init_Data+0x58>) 80001ec: 603b str r3, [r7, #0] if (src != dst) 80001ee: 687a ldr r2, [r7, #4] 80001f0: 683b ldr r3, [r7, #0] 80001f2: 429a cmp r2, r3 80001f4: d00c beq.n 8000210 <__Init_Data+0x30> while(dst < &_edata) 80001f6: e007 b.n 8000208 <__Init_Data+0x28> *(dst++) = *(src++); 80001f8: 687a ldr r2, [r7, #4] 80001fa: 1d13 adds r3, r2, #4 80001fc: 607b str r3, [r7, #4] 80001fe: 683b ldr r3, [r7, #0] 8000200: 1d19 adds r1, r3, #4 8000202: 6039 str r1, [r7, #0] 8000204: 6812 ldr r2, [r2, #0] 8000206: 601a str r2, [r3, #0] while(dst < &_edata) 8000208: 683b ldr r3, [r7, #0] 800020a: 4a0c ldr r2, [pc, #48] @ (800023c <__Init_Data+0x5c>) 800020c: 4293 cmp r3, r2 800020e: d3f3 bcc.n 80001f8 <__Init_Data+0x18> /* zero the bss segment */ dst = &_sbss; 8000210: 4b0b ldr r3, [pc, #44] @ (8000240 <__Init_Data+0x60>) 8000212: 603b str r3, [r7, #0] while(dst < &_ebss) 8000214: e004 b.n 8000220 <__Init_Data+0x40> *(dst++) = 0; 8000216: 683b ldr r3, [r7, #0] 8000218: 1d1a adds r2, r3, #4 800021a: 603a str r2, [r7, #0] 800021c: 2200 movs r2, #0 800021e: 601a str r2, [r3, #0] while(dst < &_ebss) 8000220: 683b ldr r3, [r7, #0] 8000222: 4a08 ldr r2, [pc, #32] @ (8000244 <__Init_Data+0x64>) 8000224: 4293 cmp r3, r2 8000226: d3f6 bcc.n 8000216 <__Init_Data+0x36> } 8000228: bf00 nop 800022a: bf00 nop 800022c: 370c adds r7, #12 800022e: 46bd mov sp, r7 8000230: bc80 pop {r7} 8000232: 4770 bx lr 8000234: 08003ae0 .word 0x08003ae0 8000238: 20000000 .word 0x20000000 800023c: 200001e0 .word 0x200001e0 8000240: 200001e0 .word 0x200001e0 8000244: 20000360 .word 0x20000360 08000248 : void Reset_Handler(void) { 8000248: 4668 mov r0, sp 800024a: f020 0107 bic.w r1, r0, #7 800024e: 468d mov sp, r1 8000250: b589 push {r0, r3, r7, lr} 8000252: af00 add r7, sp, #0 __Init_Data(); /* Initialize memory, data and bss */ 8000254: f7ff ffc4 bl 80001e0 <__Init_Data> extern u32 _isr_vectors_offs; /* the offset to the vector table in ram */ SCB->VTOR = 0x08000000 | ((u32)&_isr_vectors_offs & (u32)0x1FFFFF80); /* set interrupt vector table address */ 8000258: 4b07 ldr r3, [pc, #28] @ (8000278 ) 800025a: f023 4368 bic.w r3, r3, #3892314112 @ 0xe8000000 800025e: f023 037f bic.w r3, r3, #127 @ 0x7f 8000262: 4a06 ldr r2, [pc, #24] @ (800027c ) 8000264: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 8000268: 6093 str r3, [r2, #8] SystemInit(); /* configure the clock */ 800026a: f000 f817 bl 800029c main(); /* start execution of the program */ 800026e: f000 f80b bl 8000288
while(1) {} 8000272: bf00 nop 8000274: e7fd b.n 8000272 8000276: bf00 nop 8000278: 00000000 .word 0x00000000 800027c: e000ed00 .word 0xe000ed00 08000280 : #pragma weak DMA2_Channel2_IRQHandler = Default_Handler #pragma weak DMA2_Channel3_IRQHandler = Default_Handler #pragma weak DMA2_Channel4_5_IRQHandler = Default_Handler void Default_Handler(void) { 8000280: b480 push {r7} 8000282: af00 add r7, sp, #0 while (1) {} 8000284: bf00 nop 8000286: e7fd b.n 8000284 08000288
: #include int main() { 8000288: b580 push {r7, lr} 800028a: af00 add r7, sp, #0 // uart_sendStr("Config MPU6050..."); // UART_CR(); // MPU_init(); // uart_sendStr("MPU6050 Connect Success!"); // UART_CR(); avm_core_module_st.init_module(NULL); 800028c: 4b02 ldr r3, [pc, #8] @ (8000298 ) 800028e: 689b ldr r3, [r3, #8] 8000290: 2000 movs r0, #0 8000292: 4798 blx r3 // avm_uart_module_st.init_module(avm_uart_module_st.confs); // uart_init(72, 115200); while(1) { 8000294: bf00 nop 8000296: e7fd b.n 8000294 8000298: 20000004 .word 0x20000004 0800029c : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800029c: b580 push {r7, lr} 800029e: af00 add r7, sp, #0 /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; 80002a0: 4b15 ldr r3, [pc, #84] @ (80002f8 ) 80002a2: 681b ldr r3, [r3, #0] 80002a4: 4a14 ldr r2, [pc, #80] @ (80002f8 ) 80002a6: f043 0301 orr.w r3, r3, #1 80002aa: 6013 str r3, [r2, #0] /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ #ifndef STM32F10X_CL RCC->CFGR &= (uint32_t)0xF8FF0000; 80002ac: 4b12 ldr r3, [pc, #72] @ (80002f8 ) 80002ae: 685a ldr r2, [r3, #4] 80002b0: 4911 ldr r1, [pc, #68] @ (80002f8 ) 80002b2: 4b12 ldr r3, [pc, #72] @ (80002fc ) 80002b4: 4013 ands r3, r2 80002b6: 604b str r3, [r1, #4] #else RCC->CFGR &= (uint32_t)0xF0FF0000; #endif /* STM32F10X_CL */ /* Reset HSEON, CSSON and PLLON bits */ RCC->CR &= (uint32_t)0xFEF6FFFF; 80002b8: 4b0f ldr r3, [pc, #60] @ (80002f8 ) 80002ba: 681b ldr r3, [r3, #0] 80002bc: 4a0e ldr r2, [pc, #56] @ (80002f8 ) 80002be: f023 7384 bic.w r3, r3, #17301504 @ 0x1080000 80002c2: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80002c6: 6013 str r3, [r2, #0] /* Reset HSEBYP bit */ RCC->CR &= (uint32_t)0xFFFBFFFF; 80002c8: 4b0b ldr r3, [pc, #44] @ (80002f8 ) 80002ca: 681b ldr r3, [r3, #0] 80002cc: 4a0a ldr r2, [pc, #40] @ (80002f8 ) 80002ce: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80002d2: 6013 str r3, [r2, #0] /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ RCC->CFGR &= (uint32_t)0xFF80FFFF; 80002d4: 4b08 ldr r3, [pc, #32] @ (80002f8 ) 80002d6: 685b ldr r3, [r3, #4] 80002d8: 4a07 ldr r2, [pc, #28] @ (80002f8 ) 80002da: f423 03fe bic.w r3, r3, #8323072 @ 0x7f0000 80002de: 6053 str r3, [r2, #4] /* Reset CFGR2 register */ RCC->CFGR2 = 0x00000000; #else /* Disable all interrupts and clear pending bits */ RCC->CIR = 0x009F0000; 80002e0: 4b05 ldr r3, [pc, #20] @ (80002f8 ) 80002e2: f44f 021f mov.w r2, #10420224 @ 0x9f0000 80002e6: 609a str r2, [r3, #8] #endif /* DATA_IN_ExtSRAM */ #endif /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ /* Configure the Flash Latency cycles and enable prefetch buffer */ SetSysClock(); 80002e8: f000 f87e bl 80003e8 #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ 80002ec: 4b04 ldr r3, [pc, #16] @ (8000300 ) 80002ee: f04f 6200 mov.w r2, #134217728 @ 0x8000000 80002f2: 609a str r2, [r3, #8] #endif } 80002f4: bf00 nop 80002f6: bd80 pop {r7, pc} 80002f8: 40021000 .word 0x40021000 80002fc: f8ff0000 .word 0xf8ff0000 8000300: e000ed00 .word 0xe000ed00 08000304 : * value for HSE crystal. * @param None * @retval None */ void SystemCoreClockUpdate (void) { 8000304: b480 push {r7} 8000306: b085 sub sp, #20 8000308: af00 add r7, sp, #0 uint32_t tmp = 0, pllmull = 0, pllsource = 0; 800030a: 2300 movs r3, #0 800030c: 60fb str r3, [r7, #12] 800030e: 2300 movs r3, #0 8000310: 60bb str r3, [r7, #8] 8000312: 2300 movs r3, #0 8000314: 607b str r3, [r7, #4] #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) uint32_t prediv1factor = 0; #endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; 8000316: 4b2f ldr r3, [pc, #188] @ (80003d4 ) 8000318: 685b ldr r3, [r3, #4] 800031a: f003 030c and.w r3, r3, #12 800031e: 60fb str r3, [r7, #12] switch (tmp) 8000320: 68fb ldr r3, [r7, #12] 8000322: 2b08 cmp r3, #8 8000324: d011 beq.n 800034a 8000326: 68fb ldr r3, [r7, #12] 8000328: 2b08 cmp r3, #8 800032a: d83a bhi.n 80003a2 800032c: 68fb ldr r3, [r7, #12] 800032e: 2b00 cmp r3, #0 8000330: d003 beq.n 800033a 8000332: 68fb ldr r3, [r7, #12] 8000334: 2b04 cmp r3, #4 8000336: d004 beq.n 8000342 8000338: e033 b.n 80003a2 { case 0x00: /* HSI used as system clock */ SystemCoreClock = HSI_VALUE; 800033a: 4b27 ldr r3, [pc, #156] @ (80003d8 ) 800033c: 4a27 ldr r2, [pc, #156] @ (80003dc ) 800033e: 601a str r2, [r3, #0] break; 8000340: e033 b.n 80003aa case 0x04: /* HSE used as system clock */ SystemCoreClock = HSE_VALUE; 8000342: 4b25 ldr r3, [pc, #148] @ (80003d8 ) 8000344: 4a25 ldr r2, [pc, #148] @ (80003dc ) 8000346: 601a str r2, [r3, #0] break; 8000348: e02f b.n 80003aa case 0x08: /* PLL used as system clock */ /* Get PLL clock source and multiplication factor ----------------------*/ pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; 800034a: 4b22 ldr r3, [pc, #136] @ (80003d4 ) 800034c: 685b ldr r3, [r3, #4] 800034e: f403 1370 and.w r3, r3, #3932160 @ 0x3c0000 8000352: 60bb str r3, [r7, #8] pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; 8000354: 4b1f ldr r3, [pc, #124] @ (80003d4 ) 8000356: 685b ldr r3, [r3, #4] 8000358: f403 3380 and.w r3, r3, #65536 @ 0x10000 800035c: 607b str r3, [r7, #4] #ifndef STM32F10X_CL pllmull = ( pllmull >> 18) + 2; 800035e: 68bb ldr r3, [r7, #8] 8000360: 0c9b lsrs r3, r3, #18 8000362: 3302 adds r3, #2 8000364: 60bb str r3, [r7, #8] if (pllsource == 0x00) 8000366: 687b ldr r3, [r7, #4] 8000368: 2b00 cmp r3, #0 800036a: d106 bne.n 800037a { /* HSI oscillator clock divided by 2 selected as PLL clock entry */ SystemCoreClock = (HSI_VALUE >> 1) * pllmull; 800036c: 68bb ldr r3, [r7, #8] 800036e: 4a1c ldr r2, [pc, #112] @ (80003e0 ) 8000370: fb02 f303 mul.w r3, r2, r3 8000374: 4a18 ldr r2, [pc, #96] @ (80003d8 ) 8000376: 6013 str r3, [r2, #0] pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; } } #endif /* STM32F10X_CL */ break; 8000378: e017 b.n 80003aa if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) 800037a: 4b16 ldr r3, [pc, #88] @ (80003d4 ) 800037c: 685b ldr r3, [r3, #4] 800037e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8000382: 2b00 cmp r3, #0 8000384: d006 beq.n 8000394 SystemCoreClock = (HSE_VALUE >> 1) * pllmull; 8000386: 68bb ldr r3, [r7, #8] 8000388: 4a15 ldr r2, [pc, #84] @ (80003e0 ) 800038a: fb02 f303 mul.w r3, r2, r3 800038e: 4a12 ldr r2, [pc, #72] @ (80003d8 ) 8000390: 6013 str r3, [r2, #0] break; 8000392: e00a b.n 80003aa SystemCoreClock = HSE_VALUE * pllmull; 8000394: 68bb ldr r3, [r7, #8] 8000396: 4a11 ldr r2, [pc, #68] @ (80003dc ) 8000398: fb02 f303 mul.w r3, r2, r3 800039c: 4a0e ldr r2, [pc, #56] @ (80003d8 ) 800039e: 6013 str r3, [r2, #0] break; 80003a0: e003 b.n 80003aa default: SystemCoreClock = HSI_VALUE; 80003a2: 4b0d ldr r3, [pc, #52] @ (80003d8 ) 80003a4: 4a0d ldr r2, [pc, #52] @ (80003dc ) 80003a6: 601a str r2, [r3, #0] break; 80003a8: bf00 nop } /* Compute HCLK clock frequency ----------------*/ /* Get HCLK prescaler */ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; 80003aa: 4b0a ldr r3, [pc, #40] @ (80003d4 ) 80003ac: 685b ldr r3, [r3, #4] 80003ae: 091b lsrs r3, r3, #4 80003b0: f003 030f and.w r3, r3, #15 80003b4: 4a0b ldr r2, [pc, #44] @ (80003e4 ) 80003b6: 5cd3 ldrb r3, [r2, r3] 80003b8: b2db uxtb r3, r3 80003ba: 60fb str r3, [r7, #12] /* HCLK clock frequency */ SystemCoreClock >>= tmp; 80003bc: 4b06 ldr r3, [pc, #24] @ (80003d8 ) 80003be: 681a ldr r2, [r3, #0] 80003c0: 68fb ldr r3, [r7, #12] 80003c2: fa22 f303 lsr.w r3, r2, r3 80003c6: 4a04 ldr r2, [pc, #16] @ (80003d8 ) 80003c8: 6013 str r3, [r2, #0] } 80003ca: bf00 nop 80003cc: 3714 adds r7, #20 80003ce: 46bd mov sp, r7 80003d0: bc80 pop {r7} 80003d2: 4770 bx lr 80003d4: 40021000 .word 0x40021000 80003d8: 20000000 .word 0x20000000 80003dc: 007a1200 .word 0x007a1200 80003e0: 003d0900 .word 0x003d0900 80003e4: 080039e0 .word 0x080039e0 080003e8 : * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. * @param None * @retval None */ static void SetSysClock(void) { 80003e8: b580 push {r7, lr} 80003ea: af00 add r7, sp, #0 #elif defined SYSCLK_FREQ_48MHz SetSysClockTo48(); #elif defined SYSCLK_FREQ_56MHz SetSysClockTo56(); #elif defined SYSCLK_FREQ_72MHz SetSysClockTo72(); 80003ec: f000 f802 bl 80003f4 #endif /* If none of the define above is enabled, the HSI is used as System clock source (default after reset) */ } 80003f0: bf00 nop 80003f2: bd80 pop {r7, pc} 080003f4 : * @note This function should be used only after reset. * @param None * @retval None */ static void SetSysClockTo72(void) { 80003f4: b480 push {r7} 80003f6: b083 sub sp, #12 80003f8: af00 add r7, sp, #0 __IO uint32_t StartUpCounter = 0, HSEStatus = 0; 80003fa: 2300 movs r3, #0 80003fc: 607b str r3, [r7, #4] 80003fe: 2300 movs r3, #0 8000400: 603b str r3, [r7, #0] /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ /* Enable HSE */ RCC->CR |= ((uint32_t)RCC_CR_HSEON); 8000402: 4b3a ldr r3, [pc, #232] @ (80004ec ) 8000404: 681b ldr r3, [r3, #0] 8000406: 4a39 ldr r2, [pc, #228] @ (80004ec ) 8000408: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800040c: 6013 str r3, [r2, #0] /* Wait till HSE is ready and if Time out is reached exit */ do { HSEStatus = RCC->CR & RCC_CR_HSERDY; 800040e: 4b37 ldr r3, [pc, #220] @ (80004ec ) 8000410: 681b ldr r3, [r3, #0] 8000412: f403 3300 and.w r3, r3, #131072 @ 0x20000 8000416: 603b str r3, [r7, #0] StartUpCounter++; 8000418: 687b ldr r3, [r7, #4] 800041a: 3301 adds r3, #1 800041c: 607b str r3, [r7, #4] } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); 800041e: 683b ldr r3, [r7, #0] 8000420: 2b00 cmp r3, #0 8000422: d103 bne.n 800042c 8000424: 687b ldr r3, [r7, #4] 8000426: f5b3 6fa0 cmp.w r3, #1280 @ 0x500 800042a: d1f0 bne.n 800040e if ((RCC->CR & RCC_CR_HSERDY) != RESET) 800042c: 4b2f ldr r3, [pc, #188] @ (80004ec ) 800042e: 681b ldr r3, [r3, #0] 8000430: f403 3300 and.w r3, r3, #131072 @ 0x20000 8000434: 2b00 cmp r3, #0 8000436: d002 beq.n 800043e { HSEStatus = (uint32_t)0x01; 8000438: 2301 movs r3, #1 800043a: 603b str r3, [r7, #0] 800043c: e001 b.n 8000442 } else { HSEStatus = (uint32_t)0x00; 800043e: 2300 movs r3, #0 8000440: 603b str r3, [r7, #0] } if (HSEStatus == (uint32_t)0x01) 8000442: 683b ldr r3, [r7, #0] 8000444: 2b01 cmp r3, #1 8000446: d14b bne.n 80004e0 { /* Enable Prefetch Buffer */ FLASH->ACR |= FLASH_ACR_PRFTBE; 8000448: 4b29 ldr r3, [pc, #164] @ (80004f0 ) 800044a: 681b ldr r3, [r3, #0] 800044c: 4a28 ldr r2, [pc, #160] @ (80004f0 ) 800044e: f043 0310 orr.w r3, r3, #16 8000452: 6013 str r3, [r2, #0] /* Flash 2 wait state */ FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); 8000454: 4b26 ldr r3, [pc, #152] @ (80004f0 ) 8000456: 681b ldr r3, [r3, #0] 8000458: 4a25 ldr r2, [pc, #148] @ (80004f0 ) 800045a: f023 0303 bic.w r3, r3, #3 800045e: 6013 str r3, [r2, #0] FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; 8000460: 4b23 ldr r3, [pc, #140] @ (80004f0 ) 8000462: 681b ldr r3, [r3, #0] 8000464: 4a22 ldr r2, [pc, #136] @ (80004f0 ) 8000466: f043 0302 orr.w r3, r3, #2 800046a: 6013 str r3, [r2, #0] /* HCLK = SYSCLK */ RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; 800046c: 4b1f ldr r3, [pc, #124] @ (80004ec ) 800046e: 4a1f ldr r2, [pc, #124] @ (80004ec ) 8000470: 685b ldr r3, [r3, #4] 8000472: 6053 str r3, [r2, #4] /* PCLK2 = HCLK */ RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; 8000474: 4b1d ldr r3, [pc, #116] @ (80004ec ) 8000476: 4a1d ldr r2, [pc, #116] @ (80004ec ) 8000478: 685b ldr r3, [r3, #4] 800047a: 6053 str r3, [r2, #4] /* PCLK1 = HCLK */ RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; 800047c: 4b1b ldr r3, [pc, #108] @ (80004ec ) 800047e: 685b ldr r3, [r3, #4] 8000480: 4a1a ldr r2, [pc, #104] @ (80004ec ) 8000482: f443 6380 orr.w r3, r3, #1024 @ 0x400 8000486: 6053 str r3, [r2, #4] RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLMULL9); #else /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | 8000488: 4b18 ldr r3, [pc, #96] @ (80004ec ) 800048a: 685b ldr r3, [r3, #4] 800048c: 4a17 ldr r2, [pc, #92] @ (80004ec ) 800048e: f423 137c bic.w r3, r3, #4128768 @ 0x3f0000 8000492: 6053 str r3, [r2, #4] RCC_CFGR_PLLMULL)); RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); 8000494: 4b15 ldr r3, [pc, #84] @ (80004ec ) 8000496: 685b ldr r3, [r3, #4] 8000498: 4a14 ldr r2, [pc, #80] @ (80004ec ) 800049a: f443 13e8 orr.w r3, r3, #1900544 @ 0x1d0000 800049e: 6053 str r3, [r2, #4] #endif /* STM32F10X_CL */ /* Enable PLL */ RCC->CR |= RCC_CR_PLLON; 80004a0: 4b12 ldr r3, [pc, #72] @ (80004ec ) 80004a2: 681b ldr r3, [r3, #0] 80004a4: 4a11 ldr r2, [pc, #68] @ (80004ec ) 80004a6: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 80004aa: 6013 str r3, [r2, #0] /* Wait till PLL is ready */ while((RCC->CR & RCC_CR_PLLRDY) == 0) 80004ac: bf00 nop 80004ae: 4b0f ldr r3, [pc, #60] @ (80004ec ) 80004b0: 681b ldr r3, [r3, #0] 80004b2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80004b6: 2b00 cmp r3, #0 80004b8: d0f9 beq.n 80004ae { } /* Select PLL as system clock source */ RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); 80004ba: 4b0c ldr r3, [pc, #48] @ (80004ec ) 80004bc: 685b ldr r3, [r3, #4] 80004be: 4a0b ldr r2, [pc, #44] @ (80004ec ) 80004c0: f023 0303 bic.w r3, r3, #3 80004c4: 6053 str r3, [r2, #4] RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; 80004c6: 4b09 ldr r3, [pc, #36] @ (80004ec ) 80004c8: 685b ldr r3, [r3, #4] 80004ca: 4a08 ldr r2, [pc, #32] @ (80004ec ) 80004cc: f043 0302 orr.w r3, r3, #2 80004d0: 6053 str r3, [r2, #4] /* Wait till PLL is used as system clock source */ while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) 80004d2: bf00 nop 80004d4: 4b05 ldr r3, [pc, #20] @ (80004ec ) 80004d6: 685b ldr r3, [r3, #4] 80004d8: f003 030c and.w r3, r3, #12 80004dc: 2b08 cmp r3, #8 80004de: d1f9 bne.n 80004d4 } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ } } 80004e0: bf00 nop 80004e2: 370c adds r7, #12 80004e4: 46bd mov sp, r7 80004e6: bc80 pop {r7} 80004e8: 4770 bx lr 80004ea: bf00 nop 80004ec: 40021000 .word 0x40021000 80004f0: 40022000 .word 0x40022000 080004f4 : priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80004f4: b480 push {r7} 80004f6: b085 sub sp, #20 80004f8: af00 add r7, sp, #0 80004fa: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */ 80004fc: 687b ldr r3, [r7, #4] 80004fe: f003 0307 and.w r3, r3, #7 8000502: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8000504: 4b0c ldr r3, [pc, #48] @ (8000538 ) 8000506: 68db ldr r3, [r3, #12] 8000508: 60bb str r3, [r7, #8] reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ 800050a: 68ba ldr r2, [r7, #8] 800050c: f64f 03ff movw r3, #63743 @ 0xf8ff 8000510: 4013 ands r3, r2 8000512: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ 8000514: 68fb ldr r3, [r7, #12] 8000516: 021a lsls r2, r3, #8 ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) | 8000518: 68bb ldr r3, [r7, #8] 800051a: 4313 orrs r3, r2 reg_value = (reg_value | 800051c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8000520: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8000524: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8000526: 4a04 ldr r2, [pc, #16] @ (8000538 ) 8000528: 68bb ldr r3, [r7, #8] 800052a: 60d3 str r3, [r2, #12] } 800052c: bf00 nop 800052e: 3714 adds r7, #20 8000530: 46bd mov sp, r7 8000532: bc80 pop {r7} 8000534: 4770 bx lr 8000536: bf00 nop 8000538: e000ed00 .word 0xe000ed00 0800053c : avm_core_init, NULL, NULL }; void jump2ISP() { 800053c: b580 push {r7, lr} 800053e: b082 sub sp, #8 8000540: af00 add r7, sp, #0 SysTick->CTRL = 0; 8000542: 4b0a ldr r3, [pc, #40] @ (800056c ) 8000544: 2200 movs r2, #0 8000546: 601a str r2, [r3, #0] SysTick->VAL = 0; 8000548: 4b08 ldr r3, [pc, #32] @ (800056c ) 800054a: 2200 movs r2, #0 800054c: 609a str r2, [r3, #8] __set_MSP(*(unsigned int *)ISP_ADDR); 800054e: 4b08 ldr r3, [pc, #32] @ (8000570 ) 8000550: 681b ldr r3, [r3, #0] 8000552: 607b str r3, [r7, #4] \param [in] topOfMainStack Main Stack Pointer value to set */ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) { __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) ); 8000554: 687b ldr r3, [r7, #4] 8000556: f383 8808 msr MSP, r3 } 800055a: bf00 nop ((void (*)(void))*((unsigned int *)(ISP_ADDR + 4)))(); 800055c: 4b05 ldr r3, [pc, #20] @ (8000574 ) 800055e: 681b ldr r3, [r3, #0] 8000560: 4798 blx r3 } 8000562: bf00 nop 8000564: 3708 adds r7, #8 8000566: 46bd mov sp, r7 8000568: bd80 pop {r7, pc} 800056a: bf00 nop 800056c: e000e010 .word 0xe000e010 8000570: 1ffff000 .word 0x1ffff000 8000574: 1ffff004 .word 0x1ffff004 08000578 : void delay_ms(unsigned int t) { 8000578: b480 push {r7} 800057a: b085 sub sp, #20 800057c: af00 add r7, sp, #0 800057e: 6078 str r0, [r7, #4] SysTick->LOAD = 9000 * t; 8000580: 4a14 ldr r2, [pc, #80] @ (80005d4 ) 8000582: 687b ldr r3, [r7, #4] 8000584: f242 3128 movw r1, #9000 @ 0x2328 8000588: fb01 f303 mul.w r3, r1, r3 800058c: 6053 str r3, [r2, #4] SysTick->VAL = 0; 800058e: 4b11 ldr r3, [pc, #68] @ (80005d4 ) 8000590: 2200 movs r2, #0 8000592: 609a str r2, [r3, #8] SysTick->CTRL = 0x01; 8000594: 4b0f ldr r3, [pc, #60] @ (80005d4 ) 8000596: 2201 movs r2, #1 8000598: 601a str r2, [r3, #0] for(unsigned int tmp = SysTick->CTRL;(tmp&0x01)&&(!(tmp&SysTick_CTRL_COUNTFLAG));tmp = SysTick->CTRL); 800059a: 4b0e ldr r3, [pc, #56] @ (80005d4 ) 800059c: 681b ldr r3, [r3, #0] 800059e: 60fb str r3, [r7, #12] 80005a0: e002 b.n 80005a8 80005a2: 4b0c ldr r3, [pc, #48] @ (80005d4 ) 80005a4: 681b ldr r3, [r3, #0] 80005a6: 60fb str r3, [r7, #12] 80005a8: 68fb ldr r3, [r7, #12] 80005aa: f003 0301 and.w r3, r3, #1 80005ae: 2b00 cmp r3, #0 80005b0: d004 beq.n 80005bc 80005b2: 68fb ldr r3, [r7, #12] 80005b4: f403 3380 and.w r3, r3, #65536 @ 0x10000 80005b8: 2b00 cmp r3, #0 80005ba: d0f2 beq.n 80005a2 SysTick->CTRL = 0; 80005bc: 4b05 ldr r3, [pc, #20] @ (80005d4 ) 80005be: 2200 movs r2, #0 80005c0: 601a str r2, [r3, #0] SysTick->VAL = 0; 80005c2: 4b04 ldr r3, [pc, #16] @ (80005d4 ) 80005c4: 2200 movs r2, #0 80005c6: 609a str r2, [r3, #8] } 80005c8: bf00 nop 80005ca: 3714 adds r7, #20 80005cc: 46bd mov sp, r7 80005ce: bc80 pop {r7} 80005d0: 4770 bx lr 80005d2: bf00 nop 80005d4: e000e010 .word 0xe000e010 080005d8 : // 延时函数, 单位为微秒 void delay_us(unsigned int t) { 80005d8: b480 push {r7} 80005da: b085 sub sp, #20 80005dc: af00 add r7, sp, #0 80005de: 6078 str r0, [r7, #4] SysTick->LOAD = 9 * t; 80005e0: 4913 ldr r1, [pc, #76] @ (8000630 ) 80005e2: 687a ldr r2, [r7, #4] 80005e4: 4613 mov r3, r2 80005e6: 00db lsls r3, r3, #3 80005e8: 4413 add r3, r2 80005ea: 604b str r3, [r1, #4] SysTick->VAL = 0; 80005ec: 4b10 ldr r3, [pc, #64] @ (8000630 ) 80005ee: 2200 movs r2, #0 80005f0: 609a str r2, [r3, #8] SysTick->CTRL = 0x01; 80005f2: 4b0f ldr r3, [pc, #60] @ (8000630 ) 80005f4: 2201 movs r2, #1 80005f6: 601a str r2, [r3, #0] for(unsigned int tmp = SysTick->CTRL;(tmp&0x01)&&(!(tmp&SysTick_CTRL_COUNTFLAG));tmp = SysTick->CTRL); 80005f8: 4b0d ldr r3, [pc, #52] @ (8000630 ) 80005fa: 681b ldr r3, [r3, #0] 80005fc: 60fb str r3, [r7, #12] 80005fe: e002 b.n 8000606 8000600: 4b0b ldr r3, [pc, #44] @ (8000630 ) 8000602: 681b ldr r3, [r3, #0] 8000604: 60fb str r3, [r7, #12] 8000606: 68fb ldr r3, [r7, #12] 8000608: f003 0301 and.w r3, r3, #1 800060c: 2b00 cmp r3, #0 800060e: d004 beq.n 800061a 8000610: 68fb ldr r3, [r7, #12] 8000612: f403 3380 and.w r3, r3, #65536 @ 0x10000 8000616: 2b00 cmp r3, #0 8000618: d0f2 beq.n 8000600 SysTick->CTRL = 0; 800061a: 4b05 ldr r3, [pc, #20] @ (8000630 ) 800061c: 2200 movs r2, #0 800061e: 601a str r2, [r3, #0] SysTick->VAL = 0; 8000620: 4b03 ldr r3, [pc, #12] @ (8000630 ) 8000622: 2200 movs r2, #0 8000624: 609a str r2, [r3, #8] } 8000626: bf00 nop 8000628: 3714 adds r7, #20 800062a: 46bd mov sp, r7 800062c: bc80 pop {r7} 800062e: 4770 bx lr 8000630: e000e010 .word 0xe000e010 08000634 : &avm_motor_module_st, &avm_mpu_module_st, NULL }; static unsigned char avm_core_init(void *arg) { 8000634: b580 push {r7, lr} 8000636: b084 sub sp, #16 8000638: af00 add r7, sp, #0 800063a: 6078 str r0, [r7, #4] NVIC_SetPriorityGrouping(0x07 - NVIC_GROUPING); 800063c: 2004 movs r0, #4 800063e: f7ff ff59 bl 80004f4 avm_module_t *p_core = avm_modules_pool[0]; 8000642: 4b1a ldr r3, [pc, #104] @ (80006ac ) 8000644: 681b ldr r3, [r3, #0] 8000646: 60bb str r3, [r7, #8] // Count static unsigned char avm_modules_num = 0; for(;avm_modules_pool[avm_modules_num] != NULL;avm_modules_num++) { 8000648: e00e b.n 8000668 avm_modules_pool[avm_modules_num]->index = avm_modules_num; 800064a: 4b19 ldr r3, [pc, #100] @ (80006b0 ) 800064c: 781a ldrb r2, [r3, #0] 800064e: 4b18 ldr r3, [pc, #96] @ (80006b0 ) 8000650: 781b ldrb r3, [r3, #0] 8000652: 4619 mov r1, r3 8000654: 4b15 ldr r3, [pc, #84] @ (80006ac ) 8000656: f853 3021 ldr.w r3, [r3, r1, lsl #2] 800065a: 801a strh r2, [r3, #0] for(;avm_modules_pool[avm_modules_num] != NULL;avm_modules_num++) { 800065c: 4b14 ldr r3, [pc, #80] @ (80006b0 ) 800065e: 781b ldrb r3, [r3, #0] 8000660: 3301 adds r3, #1 8000662: b2da uxtb r2, r3 8000664: 4b12 ldr r3, [pc, #72] @ (80006b0 ) 8000666: 701a strb r2, [r3, #0] 8000668: 4b11 ldr r3, [pc, #68] @ (80006b0 ) 800066a: 781b ldrb r3, [r3, #0] 800066c: 461a mov r2, r3 800066e: 4b0f ldr r3, [pc, #60] @ (80006ac ) 8000670: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8000674: 2b00 cmp r3, #0 8000676: d1e8 bne.n 800064a } p_core->confs = (void *)&avm_modules_num; // Stored 8000678: 68bb ldr r3, [r7, #8] 800067a: 4a0d ldr r2, [pc, #52] @ (80006b0 ) 800067c: 605a str r2, [r3, #4] // Initial avm_module_t **this = &avm_modules_pool[1]; 800067e: 4b0d ldr r3, [pc, #52] @ (80006b4 ) 8000680: 60fb str r3, [r7, #12] for(;*this != NULL;this++) { 8000682: e00a b.n 800069a (*this)->init_module((*this)->confs); 8000684: 68fb ldr r3, [r7, #12] 8000686: 681b ldr r3, [r3, #0] 8000688: 689b ldr r3, [r3, #8] 800068a: 68fa ldr r2, [r7, #12] 800068c: 6812 ldr r2, [r2, #0] 800068e: 6852 ldr r2, [r2, #4] 8000690: 4610 mov r0, r2 8000692: 4798 blx r3 for(;*this != NULL;this++) { 8000694: 68fb ldr r3, [r7, #12] 8000696: 3304 adds r3, #4 8000698: 60fb str r3, [r7, #12] 800069a: 68fb ldr r3, [r7, #12] 800069c: 681b ldr r3, [r3, #0] 800069e: 2b00 cmp r3, #0 80006a0: d1f0 bne.n 8000684 } return 0; 80006a2: 2300 movs r3, #0 } 80006a4: 4618 mov r0, r3 80006a6: 3710 adds r7, #16 80006a8: 46bd mov sp, r7 80006aa: bd80 pop {r7, pc} 80006ac: 20000018 .word 0x20000018 80006b0: 200001e0 .word 0x200001e0 80006b4: 2000001c .word 0x2000001c 080006b8 : avm_i2c_init, NULL, NULL }; unsigned char avm_i2c_init(void *arg) { 80006b8: b580 push {r7, lr} 80006ba: b082 sub sp, #8 80006bc: af00 add r7, sp, #0 80006be: 6078 str r0, [r7, #4] IIC_init(); 80006c0: f000 f819 bl 80006f6 return 0; 80006c4: 2300 movs r3, #0 } 80006c6: 4618 mov r0, r3 80006c8: 3708 adds r7, #8 80006ca: 46bd mov sp, r7 80006cc: bd80 pop {r7, pc} 080006ce : static void delay_custom(volatile unsigned int nus) { 80006ce: b480 push {r7} 80006d0: b083 sub sp, #12 80006d2: af00 add r7, sp, #0 80006d4: 6078 str r0, [r7, #4] for(nus *= 4; nus; nus--); 80006d6: 687b ldr r3, [r7, #4] 80006d8: 009b lsls r3, r3, #2 80006da: 607b str r3, [r7, #4] 80006dc: e002 b.n 80006e4 80006de: 687b ldr r3, [r7, #4] 80006e0: 3b01 subs r3, #1 80006e2: 607b str r3, [r7, #4] 80006e4: 687b ldr r3, [r7, #4] 80006e6: 2b00 cmp r3, #0 80006e8: d1f9 bne.n 80006de } 80006ea: bf00 nop 80006ec: bf00 nop 80006ee: 370c adds r7, #12 80006f0: 46bd mov sp, r7 80006f2: bc80 pop {r7} 80006f4: 4770 bx lr 080006f6 : void IIC_init() { 80006f6: b480 push {r7} 80006f8: af00 add r7, sp, #0 RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; //GPIOB enable 80006fa: 4b0e ldr r3, [pc, #56] @ (8000734 ) 80006fc: 699b ldr r3, [r3, #24] 80006fe: 4a0d ldr r2, [pc, #52] @ (8000734 ) 8000700: f043 0308 orr.w r3, r3, #8 8000704: 6193 str r3, [r2, #24] GPIOB->CRH &= 0x00FFFFFF; //reset B13 & B15 8000706: 4b0c ldr r3, [pc, #48] @ (8000738 ) 8000708: 685b ldr r3, [r3, #4] 800070a: 4a0b ldr r2, [pc, #44] @ (8000738 ) 800070c: f023 437f bic.w r3, r3, #4278190080 @ 0xff000000 8000710: 6053 str r3, [r2, #4] GPIOB->CRH |= 0x77000000; //Set B13 & B15 b0111 8000712: 4b09 ldr r3, [pc, #36] @ (8000738 ) 8000714: 685b ldr r3, [r3, #4] 8000716: 4a08 ldr r2, [pc, #32] @ (8000738 ) 8000718: f043 43ee orr.w r3, r3, #1996488704 @ 0x77000000 800071c: 6053 str r3, [r2, #4] SDA = 1; 800071e: 4b07 ldr r3, [pc, #28] @ (800073c ) 8000720: 2201 movs r2, #1 8000722: 601a str r2, [r3, #0] SCL = 1; 8000724: 4b06 ldr r3, [pc, #24] @ (8000740 ) 8000726: 2201 movs r2, #1 8000728: 601a str r2, [r3, #0] // RCC->APB2ENR |= RCC_APB2ENR_IOPCEN; //GPIOC enable // GPIOC->CRL &= 0xF0FFFFFF; // GPIOC->CRL |= 0x03000000; //推挽输出, AD0 ----> PC6 // AD0 = 0; } 800072a: bf00 nop 800072c: 46bd mov sp, r7 800072e: bc80 pop {r7} 8000730: 4770 bx lr 8000732: bf00 nop 8000734: 40021000 .word 0x40021000 8000738: 40010c00 .word 0x40010c00 800073c: 422181b8 .word 0x422181b8 8000740: 422181bc .word 0x422181bc 08000744 : void IIC_Start() { 8000744: b580 push {r7, lr} 8000746: af00 add r7, sp, #0 SDA = 1; 8000748: 4b09 ldr r3, [pc, #36] @ (8000770 ) 800074a: 2201 movs r2, #1 800074c: 601a str r2, [r3, #0] SCL = 1; 800074e: 4b09 ldr r3, [pc, #36] @ (8000774 ) 8000750: 2201 movs r2, #1 8000752: 601a str r2, [r3, #0] IIC_DELAY(); 8000754: 2001 movs r0, #1 8000756: f7ff ffba bl 80006ce SDA = 0; 800075a: 4b05 ldr r3, [pc, #20] @ (8000770 ) 800075c: 2200 movs r2, #0 800075e: 601a str r2, [r3, #0] IIC_DELAY(); 8000760: 2001 movs r0, #1 8000762: f7ff ffb4 bl 80006ce SCL = 0; 8000766: 4b03 ldr r3, [pc, #12] @ (8000774 ) 8000768: 2200 movs r2, #0 800076a: 601a str r2, [r3, #0] } 800076c: bf00 nop 800076e: bd80 pop {r7, pc} 8000770: 422181b8 .word 0x422181b8 8000774: 422181bc .word 0x422181bc 08000778 : void IIC_Stop() { 8000778: b580 push {r7, lr} 800077a: af00 add r7, sp, #0 SCL = 0; 800077c: 4b0c ldr r3, [pc, #48] @ (80007b0 ) 800077e: 2200 movs r2, #0 8000780: 601a str r2, [r3, #0] IIC_DELAY(); 8000782: 2001 movs r0, #1 8000784: f7ff ffa3 bl 80006ce SDA = 0; 8000788: 4b0a ldr r3, [pc, #40] @ (80007b4 ) 800078a: 2200 movs r2, #0 800078c: 601a str r2, [r3, #0] IIC_DELAY(); 800078e: 2001 movs r0, #1 8000790: f7ff ff9d bl 80006ce SCL = 1; 8000794: 4b06 ldr r3, [pc, #24] @ (80007b0 ) 8000796: 2201 movs r2, #1 8000798: 601a str r2, [r3, #0] IIC_DELAY(); 800079a: 2001 movs r0, #1 800079c: f7ff ff97 bl 80006ce SDA = 1; 80007a0: 4b04 ldr r3, [pc, #16] @ (80007b4 ) 80007a2: 2201 movs r2, #1 80007a4: 601a str r2, [r3, #0] IIC_DELAY(); 80007a6: 2001 movs r0, #1 80007a8: f7ff ff91 bl 80006ce } 80007ac: bf00 nop 80007ae: bd80 pop {r7, pc} 80007b0: 422181bc .word 0x422181bc 80007b4: 422181b8 .word 0x422181b8 080007b8 : void IIC_Ack(unsigned char ack) { 80007b8: b580 push {r7, lr} 80007ba: b082 sub sp, #8 80007bc: af00 add r7, sp, #0 80007be: 4603 mov r3, r0 80007c0: 71fb strb r3, [r7, #7] SCL = 0; 80007c2: 4b0e ldr r3, [pc, #56] @ (80007fc ) 80007c4: 2200 movs r2, #0 80007c6: 601a str r2, [r3, #0] IIC_DELAY(); 80007c8: 2001 movs r0, #1 80007ca: f7ff ff80 bl 80006ce SDA = ack; 80007ce: 4a0c ldr r2, [pc, #48] @ (8000800 ) 80007d0: 79fb ldrb r3, [r7, #7] 80007d2: 6013 str r3, [r2, #0] IIC_DELAY(); 80007d4: 2001 movs r0, #1 80007d6: f7ff ff7a bl 80006ce SCL = 1; 80007da: 4b08 ldr r3, [pc, #32] @ (80007fc ) 80007dc: 2201 movs r2, #1 80007de: 601a str r2, [r3, #0] IIC_DELAY(); 80007e0: 2001 movs r0, #1 80007e2: f7ff ff74 bl 80006ce SCL = 0; 80007e6: 4b05 ldr r3, [pc, #20] @ (80007fc ) 80007e8: 2200 movs r2, #0 80007ea: 601a str r2, [r3, #0] IIC_DELAY(); 80007ec: 2001 movs r0, #1 80007ee: f7ff ff6e bl 80006ce } 80007f2: bf00 nop 80007f4: 3708 adds r7, #8 80007f6: 46bd mov sp, r7 80007f8: bd80 pop {r7, pc} 80007fa: bf00 nop 80007fc: 422181bc .word 0x422181bc 8000800: 422181b8 .word 0x422181b8 08000804 : unsigned char IIC_Wait_Ack() { 8000804: b580 push {r7, lr} 8000806: af00 add r7, sp, #0 SCL = 0; 8000808: 4b11 ldr r3, [pc, #68] @ (8000850 ) 800080a: 2200 movs r2, #0 800080c: 601a str r2, [r3, #0] IIC_DELAY(); 800080e: 2001 movs r0, #1 8000810: f7ff ff5d bl 80006ce SDA = 1; 8000814: 4b0f ldr r3, [pc, #60] @ (8000854 ) 8000816: 2201 movs r2, #1 8000818: 601a str r2, [r3, #0] IIC_DELAY(); 800081a: 2001 movs r0, #1 800081c: f7ff ff57 bl 80006ce SCL = 1; 8000820: 4b0b ldr r3, [pc, #44] @ (8000850 ) 8000822: 2201 movs r2, #1 8000824: 601a str r2, [r3, #0] IIC_DELAY(); 8000826: 2001 movs r0, #1 8000828: f7ff ff51 bl 80006ce if(READ_SDA) { 800082c: 4b0a ldr r3, [pc, #40] @ (8000858 ) 800082e: 681b ldr r3, [r3, #0] 8000830: 2b00 cmp r3, #0 8000832: d007 beq.n 8000844 SCL = 0; 8000834: 4b06 ldr r3, [pc, #24] @ (8000850 ) 8000836: 2200 movs r2, #0 8000838: 601a str r2, [r3, #0] IIC_DELAY(); 800083a: 2001 movs r0, #1 800083c: f7ff ff47 bl 80006ce return 0; 8000840: 2300 movs r3, #0 8000842: e003 b.n 800084c } SCL = 0; 8000844: 4b02 ldr r3, [pc, #8] @ (8000850 ) 8000846: 2200 movs r2, #0 8000848: 601a str r2, [r3, #0] return 1; 800084a: 2301 movs r3, #1 } 800084c: 4618 mov r0, r3 800084e: bd80 pop {r7, pc} 8000850: 422181bc .word 0x422181bc 8000854: 422181b8 .word 0x422181b8 8000858: 42218138 .word 0x42218138 0800085c : void IIC_Send(unsigned char dat) { 800085c: b580 push {r7, lr} 800085e: b084 sub sp, #16 8000860: af00 add r7, sp, #0 8000862: 4603 mov r3, r0 8000864: 71fb strb r3, [r7, #7] unsigned char i; SCL = 0; 8000866: 4b14 ldr r3, [pc, #80] @ (80008b8 ) 8000868: 2200 movs r2, #0 800086a: 601a str r2, [r3, #0] for(i = 0; i < 8; i++) { 800086c: 2300 movs r3, #0 800086e: 73fb strb r3, [r7, #15] 8000870: e019 b.n 80008a6 IIC_DELAY(); 8000872: 2001 movs r0, #1 8000874: f7ff ff2b bl 80006ce SDA = (dat&0x80)>>7; 8000878: 79fb ldrb r3, [r7, #7] 800087a: 09db lsrs r3, r3, #7 800087c: b2da uxtb r2, r3 800087e: 4b0f ldr r3, [pc, #60] @ (80008bc ) 8000880: 601a str r2, [r3, #0] dat <<= 1; 8000882: 79fb ldrb r3, [r7, #7] 8000884: 005b lsls r3, r3, #1 8000886: 71fb strb r3, [r7, #7] IIC_DELAY(); 8000888: 2001 movs r0, #1 800088a: f7ff ff20 bl 80006ce SCL = 1; 800088e: 4b0a ldr r3, [pc, #40] @ (80008b8 ) 8000890: 2201 movs r2, #1 8000892: 601a str r2, [r3, #0] IIC_DELAY(); 8000894: 2001 movs r0, #1 8000896: f7ff ff1a bl 80006ce SCL = 0; 800089a: 4b07 ldr r3, [pc, #28] @ (80008b8 ) 800089c: 2200 movs r2, #0 800089e: 601a str r2, [r3, #0] for(i = 0; i < 8; i++) { 80008a0: 7bfb ldrb r3, [r7, #15] 80008a2: 3301 adds r3, #1 80008a4: 73fb strb r3, [r7, #15] 80008a6: 7bfb ldrb r3, [r7, #15] 80008a8: 2b07 cmp r3, #7 80008aa: d9e2 bls.n 8000872 } } 80008ac: bf00 nop 80008ae: bf00 nop 80008b0: 3710 adds r7, #16 80008b2: 46bd mov sp, r7 80008b4: bd80 pop {r7, pc} 80008b6: bf00 nop 80008b8: 422181bc .word 0x422181bc 80008bc: 422181b8 .word 0x422181b8 080008c0 : unsigned char IIC_Read() { 80008c0: b580 push {r7, lr} 80008c2: b082 sub sp, #8 80008c4: af00 add r7, sp, #0 unsigned char i, dat = 0; 80008c6: 2300 movs r3, #0 80008c8: 71bb strb r3, [r7, #6] SDA = 1; 80008ca: 4b14 ldr r3, [pc, #80] @ (800091c ) 80008cc: 2201 movs r2, #1 80008ce: 601a str r2, [r3, #0] for(i = 0; i < 8; i++) { 80008d0: 2300 movs r3, #0 80008d2: 71fb strb r3, [r7, #7] 80008d4: e017 b.n 8000906 SCL = 0; 80008d6: 4b12 ldr r3, [pc, #72] @ (8000920 ) 80008d8: 2200 movs r2, #0 80008da: 601a str r2, [r3, #0] IIC_DELAY(); 80008dc: 2001 movs r0, #1 80008de: f7ff fef6 bl 80006ce SCL = 1; 80008e2: 4b0f ldr r3, [pc, #60] @ (8000920 ) 80008e4: 2201 movs r2, #1 80008e6: 601a str r2, [r3, #0] IIC_DELAY(); 80008e8: 2001 movs r0, #1 80008ea: f7ff fef0 bl 80006ce dat<<=1; 80008ee: 79bb ldrb r3, [r7, #6] 80008f0: 005b lsls r3, r3, #1 80008f2: 71bb strb r3, [r7, #6] dat |= READ_SDA; 80008f4: 4b0b ldr r3, [pc, #44] @ (8000924 ) 80008f6: 681b ldr r3, [r3, #0] 80008f8: b2da uxtb r2, r3 80008fa: 79bb ldrb r3, [r7, #6] 80008fc: 4313 orrs r3, r2 80008fe: 71bb strb r3, [r7, #6] for(i = 0; i < 8; i++) { 8000900: 79fb ldrb r3, [r7, #7] 8000902: 3301 adds r3, #1 8000904: 71fb strb r3, [r7, #7] 8000906: 79fb ldrb r3, [r7, #7] 8000908: 2b07 cmp r3, #7 800090a: d9e4 bls.n 80008d6 } SCL = 0; 800090c: 4b04 ldr r3, [pc, #16] @ (8000920 ) 800090e: 2200 movs r2, #0 8000910: 601a str r2, [r3, #0] return dat; 8000912: 79bb ldrb r3, [r7, #6] } 8000914: 4618 mov r0, r3 8000916: 3708 adds r7, #8 8000918: 46bd mov sp, r7 800091a: bd80 pop {r7, pc} 800091c: 422181b8 .word 0x422181b8 8000920: 422181bc .word 0x422181bc 8000924: 42218138 .word 0x42218138 08000928 : avm_motor_init, NULL, NULL }; static unsigned char avm_motor_init(void *arg) { 8000928: b580 push {r7, lr} 800092a: b082 sub sp, #8 800092c: af00 add r7, sp, #0 800092e: 6078 str r0, [r7, #4] MOTOR_SETTING(); 8000930: 2128 movs r1, #40 @ 0x28 8000932: f648 40a0 movw r0, #36000 @ 0x8ca0 8000936: f000 f827 bl 8000988 800093a: 4b12 ldr r3, [pc, #72] @ (8000984 ) 800093c: f240 6254 movw r2, #1620 @ 0x654 8000940: 4611 mov r1, r2 8000942: f8a3 1040 strh.w r1, [r3, #64] @ 0x40 8000946: 4b0f ldr r3, [pc, #60] @ (8000984 ) 8000948: 4611 mov r1, r2 800094a: 8799 strh r1, [r3, #60] @ 0x3c 800094c: 4b0d ldr r3, [pc, #52] @ (8000984 ) 800094e: 4611 mov r1, r2 8000950: 8719 strh r1, [r3, #56] @ 0x38 8000952: 4b0c ldr r3, [pc, #48] @ (8000984 ) 8000954: 869a strh r2, [r3, #52] @ 0x34 8000956: f44f 607a mov.w r0, #4000 @ 0xfa0 800095a: f7ff fe0d bl 8000578 800095e: 4b09 ldr r3, [pc, #36] @ (8000984 ) 8000960: f240 6272 movw r2, #1650 @ 0x672 8000964: 4611 mov r1, r2 8000966: f8a3 1040 strh.w r1, [r3, #64] @ 0x40 800096a: 4b06 ldr r3, [pc, #24] @ (8000984 ) 800096c: 4611 mov r1, r2 800096e: 8799 strh r1, [r3, #60] @ 0x3c 8000970: 4b04 ldr r3, [pc, #16] @ (8000984 ) 8000972: 4611 mov r1, r2 8000974: 8719 strh r1, [r3, #56] @ 0x38 8000976: 4b03 ldr r3, [pc, #12] @ (8000984 ) 8000978: 869a strh r2, [r3, #52] @ 0x34 return 0; 800097a: 2300 movs r3, #0 } 800097c: 4618 mov r0, r3 800097e: 3708 adds r7, #8 8000980: 46bd mov sp, r7 8000982: bd80 pop {r7, pc} 8000984: 40000400 .word 0x40000400 08000988 : //A7 void motor_PWM_Init(unsigned short arr, unsigned short psc) { 8000988: b480 push {r7} 800098a: b083 sub sp, #12 800098c: af00 add r7, sp, #0 800098e: 4603 mov r3, r0 8000990: 460a mov r2, r1 8000992: 80fb strh r3, [r7, #6] 8000994: 4613 mov r3, r2 8000996: 80bb strh r3, [r7, #4] //RCC->APB1ENR |= 1<<1; //TIM3 enable //RCC->APB2ENR |= 1<<2; //GPIOA enable RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; //TIM3 Enable 8000998: 4b5d ldr r3, [pc, #372] @ (8000b10 ) 800099a: 69db ldr r3, [r3, #28] 800099c: 4a5c ldr r2, [pc, #368] @ (8000b10 ) 800099e: f043 0302 orr.w r3, r3, #2 80009a2: 61d3 str r3, [r2, #28] RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //IO Port A Enable 80009a4: 4b5a ldr r3, [pc, #360] @ (8000b10 ) 80009a6: 699b ldr r3, [r3, #24] 80009a8: 4a59 ldr r2, [pc, #356] @ (8000b10 ) 80009aa: f043 0304 orr.w r3, r3, #4 80009ae: 6193 str r3, [r2, #24] RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; //IO Port B for TIM3 Channel 3 and 4 80009b0: 4b57 ldr r3, [pc, #348] @ (8000b10 ) 80009b2: 699b ldr r3, [r3, #24] 80009b4: 4a56 ldr r2, [pc, #344] @ (8000b10 ) 80009b6: f043 0308 orr.w r3, r3, #8 80009ba: 6193 str r3, [r2, #24] GPIOA->CRL &= 0x00FFFFFF; //Clean 80009bc: 4b55 ldr r3, [pc, #340] @ (8000b14 ) 80009be: 681b ldr r3, [r3, #0] 80009c0: 4a54 ldr r2, [pc, #336] @ (8000b14 ) 80009c2: f023 437f bic.w r3, r3, #4278190080 @ 0xff000000 80009c6: 6013 str r3, [r2, #0] GPIOA->CRL |= 0xBB000000; //复用推挽输出 80009c8: 4b52 ldr r3, [pc, #328] @ (8000b14 ) 80009ca: 681b ldr r3, [r3, #0] 80009cc: 4a51 ldr r2, [pc, #324] @ (8000b14 ) 80009ce: f043 433b orr.w r3, r3, #3137339392 @ 0xbb000000 80009d2: 6013 str r3, [r2, #0] GPIOA->ODR |= 1<<7; //CH2 GPIO Config 80009d4: 4b4f ldr r3, [pc, #316] @ (8000b14 ) 80009d6: 68db ldr r3, [r3, #12] 80009d8: 4a4e ldr r2, [pc, #312] @ (8000b14 ) 80009da: f043 0380 orr.w r3, r3, #128 @ 0x80 80009de: 60d3 str r3, [r2, #12] GPIOA->ODR |= 1<<6; //CH1 GPIO Config 80009e0: 4b4c ldr r3, [pc, #304] @ (8000b14 ) 80009e2: 68db ldr r3, [r3, #12] 80009e4: 4a4b ldr r2, [pc, #300] @ (8000b14 ) 80009e6: f043 0340 orr.w r3, r3, #64 @ 0x40 80009ea: 60d3 str r3, [r2, #12] GPIOB->CRL &= 0xFFFFFF00; 80009ec: 4b4a ldr r3, [pc, #296] @ (8000b18 ) 80009ee: 681b ldr r3, [r3, #0] 80009f0: 4a49 ldr r2, [pc, #292] @ (8000b18 ) 80009f2: f023 03ff bic.w r3, r3, #255 @ 0xff 80009f6: 6013 str r3, [r2, #0] GPIOB->CRL |= 0x000000BB; 80009f8: 4b47 ldr r3, [pc, #284] @ (8000b18 ) 80009fa: 681b ldr r3, [r3, #0] 80009fc: 4a46 ldr r2, [pc, #280] @ (8000b18 ) 80009fe: f043 03bb orr.w r3, r3, #187 @ 0xbb 8000a02: 6013 str r3, [r2, #0] GPIOB->ODR |= 1; 8000a04: 4b44 ldr r3, [pc, #272] @ (8000b18 ) 8000a06: 68db ldr r3, [r3, #12] 8000a08: 4a43 ldr r2, [pc, #268] @ (8000b18 ) 8000a0a: f043 0301 orr.w r3, r3, #1 8000a0e: 60d3 str r3, [r2, #12] GPIOB->ODR |= 1<<1; 8000a10: 4b41 ldr r3, [pc, #260] @ (8000b18 ) 8000a12: 68db ldr r3, [r3, #12] 8000a14: 4a40 ldr r2, [pc, #256] @ (8000b18 ) 8000a16: f043 0302 orr.w r3, r3, #2 8000a1a: 60d3 str r3, [r2, #12] TIM3->ARR = arr - 1; 8000a1c: 4a3f ldr r2, [pc, #252] @ (8000b1c ) 8000a1e: 88fb ldrh r3, [r7, #6] 8000a20: 3b01 subs r3, #1 8000a22: b29b uxth r3, r3 8000a24: 8593 strh r3, [r2, #44] @ 0x2c TIM3->PSC = psc - 1; 8000a26: 4a3d ldr r2, [pc, #244] @ (8000b1c ) 8000a28: 88bb ldrh r3, [r7, #4] 8000a2a: 3b01 subs r3, #1 8000a2c: b29b uxth r3, r3 8000a2e: 8513 strh r3, [r2, #40] @ 0x28 TIM3->CCMR1 |= 6<<4; //CH1 Set OC1M[2:0]: PWM Mode 8000a30: 4b3a ldr r3, [pc, #232] @ (8000b1c ) 8000a32: 8b1b ldrh r3, [r3, #24] 8000a34: b29b uxth r3, r3 8000a36: 4a39 ldr r2, [pc, #228] @ (8000b1c ) 8000a38: f043 0360 orr.w r3, r3, #96 @ 0x60 8000a3c: b29b uxth r3, r3 8000a3e: 8313 strh r3, [r2, #24] TIM3->CCMR1 |= 1<<3; //CH1 Set OC1PE: Enable 8000a40: 4b36 ldr r3, [pc, #216] @ (8000b1c ) 8000a42: 8b1b ldrh r3, [r3, #24] 8000a44: b29b uxth r3, r3 8000a46: 4a35 ldr r2, [pc, #212] @ (8000b1c ) 8000a48: f043 0308 orr.w r3, r3, #8 8000a4c: b29b uxth r3, r3 8000a4e: 8313 strh r3, [r2, #24] TIM3->CCMR1 |= 6<<12; //CH2 Set OC2M[2:0]: PWM Mode 8000a50: 4b32 ldr r3, [pc, #200] @ (8000b1c ) 8000a52: 8b1b ldrh r3, [r3, #24] 8000a54: b29b uxth r3, r3 8000a56: 4a31 ldr r2, [pc, #196] @ (8000b1c ) 8000a58: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8000a5c: b29b uxth r3, r3 8000a5e: 8313 strh r3, [r2, #24] TIM3->CCMR1 |= 1<<11; //CH2 Set OC2PE: Enable 8000a60: 4b2e ldr r3, [pc, #184] @ (8000b1c ) 8000a62: 8b1b ldrh r3, [r3, #24] 8000a64: b29b uxth r3, r3 8000a66: 4a2d ldr r2, [pc, #180] @ (8000b1c ) 8000a68: f443 6300 orr.w r3, r3, #2048 @ 0x800 8000a6c: b29b uxth r3, r3 8000a6e: 8313 strh r3, [r2, #24] TIM3->CCMR2 |= 6<<4; //CH3 Set OC3M[2:0]: PWM Mode 8000a70: 4b2a ldr r3, [pc, #168] @ (8000b1c ) 8000a72: 8b9b ldrh r3, [r3, #28] 8000a74: b29b uxth r3, r3 8000a76: 4a29 ldr r2, [pc, #164] @ (8000b1c ) 8000a78: f043 0360 orr.w r3, r3, #96 @ 0x60 8000a7c: b29b uxth r3, r3 8000a7e: 8393 strh r3, [r2, #28] TIM3->CCMR2 |= 1<<3; //CH3 8000a80: 4b26 ldr r3, [pc, #152] @ (8000b1c ) 8000a82: 8b9b ldrh r3, [r3, #28] 8000a84: b29b uxth r3, r3 8000a86: 4a25 ldr r2, [pc, #148] @ (8000b1c ) 8000a88: f043 0308 orr.w r3, r3, #8 8000a8c: b29b uxth r3, r3 8000a8e: 8393 strh r3, [r2, #28] TIM3->CCMR2 |= 6<<12; //CH4 8000a90: 4b22 ldr r3, [pc, #136] @ (8000b1c ) 8000a92: 8b9b ldrh r3, [r3, #28] 8000a94: b29b uxth r3, r3 8000a96: 4a21 ldr r2, [pc, #132] @ (8000b1c ) 8000a98: f443 43c0 orr.w r3, r3, #24576 @ 0x6000 8000a9c: b29b uxth r3, r3 8000a9e: 8393 strh r3, [r2, #28] TIM3->CCMR2 |= 1<<11; 8000aa0: 4b1e ldr r3, [pc, #120] @ (8000b1c ) 8000aa2: 8b9b ldrh r3, [r3, #28] 8000aa4: b29b uxth r3, r3 8000aa6: 4a1d ldr r2, [pc, #116] @ (8000b1c ) 8000aa8: f443 6300 orr.w r3, r3, #2048 @ 0x800 8000aac: b29b uxth r3, r3 8000aae: 8393 strh r3, [r2, #28] TIM3->CCER |= 1; //CH1 Output Enable 8000ab0: 4b1a ldr r3, [pc, #104] @ (8000b1c ) 8000ab2: 8c1b ldrh r3, [r3, #32] 8000ab4: b29b uxth r3, r3 8000ab6: 4a19 ldr r2, [pc, #100] @ (8000b1c ) 8000ab8: f043 0301 orr.w r3, r3, #1 8000abc: b29b uxth r3, r3 8000abe: 8413 strh r3, [r2, #32] TIM3->CCER |= 1<<4; //CH2 Output Enable 8000ac0: 4b16 ldr r3, [pc, #88] @ (8000b1c ) 8000ac2: 8c1b ldrh r3, [r3, #32] 8000ac4: b29b uxth r3, r3 8000ac6: 4a15 ldr r2, [pc, #84] @ (8000b1c ) 8000ac8: f043 0310 orr.w r3, r3, #16 8000acc: b29b uxth r3, r3 8000ace: 8413 strh r3, [r2, #32] TIM3->CCER |= 1<<8; 8000ad0: 4b12 ldr r3, [pc, #72] @ (8000b1c ) 8000ad2: 8c1b ldrh r3, [r3, #32] 8000ad4: b29b uxth r3, r3 8000ad6: 4a11 ldr r2, [pc, #68] @ (8000b1c ) 8000ad8: f443 7380 orr.w r3, r3, #256 @ 0x100 8000adc: b29b uxth r3, r3 8000ade: 8413 strh r3, [r2, #32] TIM3->CCER |= 1<<12; 8000ae0: 4b0e ldr r3, [pc, #56] @ (8000b1c ) 8000ae2: 8c1b ldrh r3, [r3, #32] 8000ae4: b29b uxth r3, r3 8000ae6: 4a0d ldr r2, [pc, #52] @ (8000b1c ) 8000ae8: f443 5380 orr.w r3, r3, #4096 @ 0x1000 8000aec: b29b uxth r3, r3 8000aee: 8413 strh r3, [r2, #32] TIM3->CR1 = 0x80; //APRE Enable 8000af0: 4b0a ldr r3, [pc, #40] @ (8000b1c ) 8000af2: 2280 movs r2, #128 @ 0x80 8000af4: 801a strh r2, [r3, #0] TIM3->CR1 |= 1; //Set CEN, Allow to Count 8000af6: 4b09 ldr r3, [pc, #36] @ (8000b1c ) 8000af8: 881b ldrh r3, [r3, #0] 8000afa: b29b uxth r3, r3 8000afc: 4a07 ldr r2, [pc, #28] @ (8000b1c ) 8000afe: f043 0301 orr.w r3, r3, #1 8000b02: b29b uxth r3, r3 8000b04: 8013 strh r3, [r2, #0] //TIM1->BDTR |= 1<<15; //高级定时器需要使能BDTR寄存器 } 8000b06: bf00 nop 8000b08: 370c adds r7, #12 8000b0a: 46bd mov sp, r7 8000b0c: bc80 pop {r7} 8000b0e: 4770 bx lr 8000b10: 40021000 .word 0x40021000 8000b14: 40010800 .word 0x40010800 8000b18: 40010c00 .word 0x40010c00 8000b1c: 40000400 .word 0x40000400 08000b20 : avm_mpu_init, NULL, NULL }; static unsigned char avm_mpu_init(void *arg) { 8000b20: b580 push {r7, lr} 8000b22: b082 sub sp, #8 8000b24: af00 add r7, sp, #0 8000b26: 6078 str r0, [r7, #4] // Delay is required after MPU6050 powered up, At least 7ms delay_ms(7); 8000b28: 2007 movs r0, #7 8000b2a: f7ff fd25 bl 8000578 MPU_init(); 8000b2e: f000 f875 bl 8000c1c return 0; 8000b32: 2300 movs r3, #0 } 8000b34: 4618 mov r0, r3 8000b36: 3708 adds r7, #8 8000b38: 46bd mov sp, r7 8000b3a: bd80 pop {r7, pc} 08000b3c : void MPU_Sigle_Write(unsigned char reg_addr, unsigned char reg_data) { 8000b3c: b580 push {r7, lr} 8000b3e: b082 sub sp, #8 8000b40: af00 add r7, sp, #0 8000b42: 4603 mov r3, r0 8000b44: 460a mov r2, r1 8000b46: 71fb strb r3, [r7, #7] 8000b48: 4613 mov r3, r2 8000b4a: 71bb strb r3, [r7, #6] IIC_Start(); 8000b4c: f7ff fdfa bl 8000744 IIC_Send(MPU6050_ADDR); 8000b50: 20d0 movs r0, #208 @ 0xd0 8000b52: f7ff fe83 bl 800085c if(!IIC_Wait_Ack()) 8000b56: f7ff fe55 bl 8000804 8000b5a: 4603 mov r3, r0 8000b5c: 2b00 cmp r3, #0 8000b5e: d102 bne.n 8000b66 LED1 = 1; 8000b60: 4b0a ldr r3, [pc, #40] @ (8000b8c ) 8000b62: 2201 movs r2, #1 8000b64: 601a str r2, [r3, #0] IIC_Send(reg_addr); 8000b66: 79fb ldrb r3, [r7, #7] 8000b68: 4618 mov r0, r3 8000b6a: f7ff fe77 bl 800085c IIC_Wait_Ack(); 8000b6e: f7ff fe49 bl 8000804 IIC_Send(reg_data); 8000b72: 79bb ldrb r3, [r7, #6] 8000b74: 4618 mov r0, r3 8000b76: f7ff fe71 bl 800085c IIC_Wait_Ack(); 8000b7a: f7ff fe43 bl 8000804 IIC_Stop(); 8000b7e: f7ff fdfb bl 8000778 } 8000b82: bf00 nop 8000b84: 3708 adds r7, #8 8000b86: 46bd mov sp, r7 8000b88: bd80 pop {r7, pc} 8000b8a: bf00 nop 8000b8c: 42228188 .word 0x42228188 08000b90 : unsigned char MPU_Sigle_Read(unsigned reg_addr) { 8000b90: b580 push {r7, lr} 8000b92: b084 sub sp, #16 8000b94: af00 add r7, sp, #0 8000b96: 6078 str r0, [r7, #4] unsigned char reg_data; IIC_Start(); 8000b98: f7ff fdd4 bl 8000744 IIC_Send(MPU6050_ADDR); 8000b9c: 20d0 movs r0, #208 @ 0xd0 8000b9e: f7ff fe5d bl 800085c IIC_Wait_Ack(); 8000ba2: f7ff fe2f bl 8000804 IIC_Send(reg_addr); 8000ba6: 687b ldr r3, [r7, #4] 8000ba8: b2db uxtb r3, r3 8000baa: 4618 mov r0, r3 8000bac: f7ff fe56 bl 800085c IIC_Wait_Ack(); 8000bb0: f7ff fe28 bl 8000804 IIC_Start(); 8000bb4: f7ff fdc6 bl 8000744 IIC_Send(MPU6050_ADDR+1); 8000bb8: 20d1 movs r0, #209 @ 0xd1 8000bba: f7ff fe4f bl 800085c IIC_Wait_Ack(); 8000bbe: f7ff fe21 bl 8000804 reg_data = IIC_Read(); 8000bc2: f7ff fe7d bl 80008c0 8000bc6: 4603 mov r3, r0 8000bc8: 73fb strb r3, [r7, #15] IIC_Ack(1); 8000bca: 2001 movs r0, #1 8000bcc: f7ff fdf4 bl 80007b8 IIC_Stop(); 8000bd0: f7ff fdd2 bl 8000778 return reg_data; 8000bd4: 7bfb ldrb r3, [r7, #15] } 8000bd6: 4618 mov r0, r3 8000bd8: 3710 adds r7, #16 8000bda: 46bd mov sp, r7 8000bdc: bd80 pop {r7, pc} 08000bde : short MPU_GetData(unsigned char REG_Addr) { 8000bde: b580 push {r7, lr} 8000be0: b084 sub sp, #16 8000be2: af00 add r7, sp, #0 8000be4: 4603 mov r3, r0 8000be6: 71fb strb r3, [r7, #7] unsigned char H, L; H = MPU_Sigle_Read(REG_Addr); 8000be8: 79fb ldrb r3, [r7, #7] 8000bea: 4618 mov r0, r3 8000bec: f7ff ffd0 bl 8000b90 8000bf0: 4603 mov r3, r0 8000bf2: 73fb strb r3, [r7, #15] L = MPU_Sigle_Read(REG_Addr+1); 8000bf4: 79fb ldrb r3, [r7, #7] 8000bf6: 3301 adds r3, #1 8000bf8: 4618 mov r0, r3 8000bfa: f7ff ffc9 bl 8000b90 8000bfe: 4603 mov r3, r0 8000c00: 73bb strb r3, [r7, #14] return (short)(H<<8)+L; 8000c02: 7bfb ldrb r3, [r7, #15] 8000c04: b29b uxth r3, r3 8000c06: 021b lsls r3, r3, #8 8000c08: b29a uxth r2, r3 8000c0a: 7bbb ldrb r3, [r7, #14] 8000c0c: b29b uxth r3, r3 8000c0e: 4413 add r3, r2 8000c10: b29b uxth r3, r3 8000c12: b21b sxth r3, r3 } 8000c14: 4618 mov r0, r3 8000c16: 3710 adds r7, #16 8000c18: 46bd mov sp, r7 8000c1a: bd80 pop {r7, pc} 08000c1c : void MPU_init() { 8000c1c: b580 push {r7, lr} 8000c1e: af00 add r7, sp, #0 IIC_init(); 8000c20: f7ff fd69 bl 80006f6 do { MPU_Sigle_Write(PWR_MGMT_1, 0x00); 8000c24: 2100 movs r1, #0 8000c26: 206b movs r0, #107 @ 0x6b 8000c28: f7ff ff88 bl 8000b3c MPU_Sigle_Write(SMPLRT_DIV, 0x07); 8000c2c: 2107 movs r1, #7 8000c2e: 2019 movs r0, #25 8000c30: f7ff ff84 bl 8000b3c MPU_Sigle_Write(CONFIG, 0x06); 8000c34: 2106 movs r1, #6 8000c36: 201a movs r0, #26 8000c38: f7ff ff80 bl 8000b3c MPU_Sigle_Write(GYRO_CONFIG, 0x18); 8000c3c: 2118 movs r1, #24 8000c3e: 201b movs r0, #27 8000c40: f7ff ff7c bl 8000b3c MPU_Sigle_Write(ACCEL_CONFIG, 0x01); 8000c44: 2101 movs r1, #1 8000c46: 201c movs r0, #28 8000c48: f7ff ff78 bl 8000b3c } while(IMU_NOT_CONNECTED); 8000c4c: 2075 movs r0, #117 @ 0x75 8000c4e: f7ff ff9f bl 8000b90 8000c52: 4603 mov r3, r0 8000c54: 2b68 cmp r3, #104 @ 0x68 8000c56: d1e5 bne.n 8000c24 } 8000c58: bf00 nop 8000c5a: bf00 nop 8000c5c: bd80 pop {r7, pc} 08000c5e : void MPU6050_getStructData(pSixAxis cache) { 8000c5e: b580 push {r7, lr} 8000c60: b082 sub sp, #8 8000c62: af00 add r7, sp, #0 8000c64: 6078 str r0, [r7, #4] cache->gX = (float)MPU_GetData(GYRO_XOUT_H)/16.4f; 8000c66: 2043 movs r0, #67 @ 0x43 8000c68: f7ff ffb9 bl 8000bde 8000c6c: 4603 mov r3, r0 8000c6e: 4618 mov r0, r3 8000c70: f002 fc50 bl 8003514 <__aeabi_i2f> 8000c74: 4603 mov r3, r0 8000c76: 494d ldr r1, [pc, #308] @ (8000dac ) 8000c78: 4618 mov r0, r3 8000c7a: f002 fd53 bl 8003724 <__aeabi_fdiv> 8000c7e: 4603 mov r3, r0 8000c80: 461a mov r2, r3 8000c82: 687b ldr r3, [r7, #4] 8000c84: 601a str r2, [r3, #0] cache->gY = (float)MPU_GetData(GYRO_YOUT_H)/16.4f; 8000c86: 2045 movs r0, #69 @ 0x45 8000c88: f7ff ffa9 bl 8000bde 8000c8c: 4603 mov r3, r0 8000c8e: 4618 mov r0, r3 8000c90: f002 fc40 bl 8003514 <__aeabi_i2f> 8000c94: 4603 mov r3, r0 8000c96: 4945 ldr r1, [pc, #276] @ (8000dac ) 8000c98: 4618 mov r0, r3 8000c9a: f002 fd43 bl 8003724 <__aeabi_fdiv> 8000c9e: 4603 mov r3, r0 8000ca0: 461a mov r2, r3 8000ca2: 687b ldr r3, [r7, #4] 8000ca4: 605a str r2, [r3, #4] cache->gZ = (float)MPU_GetData(GYRO_ZOUT_H)/16.4f; 8000ca6: 2047 movs r0, #71 @ 0x47 8000ca8: f7ff ff99 bl 8000bde 8000cac: 4603 mov r3, r0 8000cae: 4618 mov r0, r3 8000cb0: f002 fc30 bl 8003514 <__aeabi_i2f> 8000cb4: 4603 mov r3, r0 8000cb6: 493d ldr r1, [pc, #244] @ (8000dac ) 8000cb8: 4618 mov r0, r3 8000cba: f002 fd33 bl 8003724 <__aeabi_fdiv> 8000cbe: 4603 mov r3, r0 8000cc0: 461a mov r2, r3 8000cc2: 687b ldr r3, [r7, #4] 8000cc4: 609a str r2, [r3, #8] cache->aX = (float)MPU_GetData(ACCEL_XOUT_H)/1671.83f; 8000cc6: 203b movs r0, #59 @ 0x3b 8000cc8: f7ff ff89 bl 8000bde 8000ccc: 4603 mov r3, r0 8000cce: 4618 mov r0, r3 8000cd0: f002 fc20 bl 8003514 <__aeabi_i2f> 8000cd4: 4603 mov r3, r0 8000cd6: 4936 ldr r1, [pc, #216] @ (8000db0 ) 8000cd8: 4618 mov r0, r3 8000cda: f002 fd23 bl 8003724 <__aeabi_fdiv> 8000cde: 4603 mov r3, r0 8000ce0: 461a mov r2, r3 8000ce2: 687b ldr r3, [r7, #4] 8000ce4: 60da str r2, [r3, #12] cache->aY = (float)MPU_GetData(ACCEL_YOUT_H)/1671.83f; 8000ce6: 203d movs r0, #61 @ 0x3d 8000ce8: f7ff ff79 bl 8000bde 8000cec: 4603 mov r3, r0 8000cee: 4618 mov r0, r3 8000cf0: f002 fc10 bl 8003514 <__aeabi_i2f> 8000cf4: 4603 mov r3, r0 8000cf6: 492e ldr r1, [pc, #184] @ (8000db0 ) 8000cf8: 4618 mov r0, r3 8000cfa: f002 fd13 bl 8003724 <__aeabi_fdiv> 8000cfe: 4603 mov r3, r0 8000d00: 461a mov r2, r3 8000d02: 687b ldr r3, [r7, #4] 8000d04: 611a str r2, [r3, #16] cache->aZ = (float)MPU_GetData(ACCEL_ZOUT_H)/1671.83f; 8000d06: 203f movs r0, #63 @ 0x3f 8000d08: f7ff ff69 bl 8000bde 8000d0c: 4603 mov r3, r0 8000d0e: 4618 mov r0, r3 8000d10: f002 fc00 bl 8003514 <__aeabi_i2f> 8000d14: 4603 mov r3, r0 8000d16: 4926 ldr r1, [pc, #152] @ (8000db0 ) 8000d18: 4618 mov r0, r3 8000d1a: f002 fd03 bl 8003724 <__aeabi_fdiv> 8000d1e: 4603 mov r3, r0 8000d20: 461a mov r2, r3 8000d22: 687b ldr r3, [r7, #4] 8000d24: 615a str r2, [r3, #20] #ifdef IMU_SOFTWARE_FIXED cache->gX += G_X_OFFSET; 8000d26: 687b ldr r3, [r7, #4] 8000d28: 681b ldr r3, [r3, #0] 8000d2a: 4922 ldr r1, [pc, #136] @ (8000db4 ) 8000d2c: 4618 mov r0, r3 8000d2e: f002 fb3d bl 80033ac <__addsf3> 8000d32: 4603 mov r3, r0 8000d34: 461a mov r2, r3 8000d36: 687b ldr r3, [r7, #4] 8000d38: 601a str r2, [r3, #0] cache->gY += G_Y_OFFSET; 8000d3a: 687b ldr r3, [r7, #4] 8000d3c: 685b ldr r3, [r3, #4] 8000d3e: 491e ldr r1, [pc, #120] @ (8000db8 ) 8000d40: 4618 mov r0, r3 8000d42: f002 fb33 bl 80033ac <__addsf3> 8000d46: 4603 mov r3, r0 8000d48: 461a mov r2, r3 8000d4a: 687b ldr r3, [r7, #4] 8000d4c: 605a str r2, [r3, #4] cache->gZ += G_Z_OFFSET; 8000d4e: 687b ldr r3, [r7, #4] 8000d50: 689b ldr r3, [r3, #8] 8000d52: 491a ldr r1, [pc, #104] @ (8000dbc ) 8000d54: 4618 mov r0, r3 8000d56: f002 fb29 bl 80033ac <__addsf3> 8000d5a: 4603 mov r3, r0 8000d5c: 461a mov r2, r3 8000d5e: 687b ldr r3, [r7, #4] 8000d60: 609a str r2, [r3, #8] cache->aX += A_X_OFFSET; 8000d62: 687b ldr r3, [r7, #4] 8000d64: 68db ldr r3, [r3, #12] 8000d66: f04f 0100 mov.w r1, #0 8000d6a: 4618 mov r0, r3 8000d6c: f002 fb1e bl 80033ac <__addsf3> 8000d70: 4603 mov r3, r0 8000d72: 461a mov r2, r3 8000d74: 687b ldr r3, [r7, #4] 8000d76: 60da str r2, [r3, #12] cache->aY += A_Y_OFFSET; 8000d78: 687b ldr r3, [r7, #4] 8000d7a: 691b ldr r3, [r3, #16] 8000d7c: f04f 0100 mov.w r1, #0 8000d80: 4618 mov r0, r3 8000d82: f002 fb13 bl 80033ac <__addsf3> 8000d86: 4603 mov r3, r0 8000d88: 461a mov r2, r3 8000d8a: 687b ldr r3, [r7, #4] 8000d8c: 611a str r2, [r3, #16] cache->aZ += A_Z_OFFSET; 8000d8e: 687b ldr r3, [r7, #4] 8000d90: 695b ldr r3, [r3, #20] 8000d92: 490b ldr r1, [pc, #44] @ (8000dc0 ) 8000d94: 4618 mov r0, r3 8000d96: f002 fb09 bl 80033ac <__addsf3> 8000d9a: 4603 mov r3, r0 8000d9c: 461a mov r2, r3 8000d9e: 687b ldr r3, [r7, #4] 8000da0: 615a str r2, [r3, #20] #endif } 8000da2: bf00 nop 8000da4: 3708 adds r7, #8 8000da6: 46bd mov sp, r7 8000da8: bd80 pop {r7, pc} 8000daa: bf00 nop 8000dac: 41833333 .word 0x41833333 8000db0: 44d0fa8f .word 0x44d0fa8f 8000db4: 3fcaeb1c .word 0x3fcaeb1c 8000db8: 3f4ae7d5 .word 0x3f4ae7d5 8000dbc: 4000c63f .word 0x4000c63f 8000dc0: 3e4ccccd .word 0x3e4ccccd 08000dc4 : // } float g_Yaw, g_Pitch, g_Roll; SixAxis avm_euler; void IMU_Comput(SixAxis cache) { 8000dc4: b084 sub sp, #16 8000dc6: b5f0 push {r4, r5, r6, r7, lr} 8000dc8: b089 sub sp, #36 @ 0x24 8000dca: af00 add r7, sp, #0 8000dcc: f107 0438 add.w r4, r7, #56 @ 0x38 8000dd0: e884 000f stmia.w r4, {r0, r1, r2, r3} float norm; //模 float vx, vy, vz; float ex, ey, ez; norm = sqrt(cache.aX*cache.aX + cache.aY*cache.aY + cache.aZ*cache.aZ); //取模 8000dd4: 6c7b ldr r3, [r7, #68] @ 0x44 8000dd6: 6c7a ldr r2, [r7, #68] @ 0x44 8000dd8: 4611 mov r1, r2 8000dda: 4618 mov r0, r3 8000ddc: f002 fbee bl 80035bc <__aeabi_fmul> 8000de0: 4603 mov r3, r0 8000de2: 461c mov r4, r3 8000de4: 6cbb ldr r3, [r7, #72] @ 0x48 8000de6: 6cba ldr r2, [r7, #72] @ 0x48 8000de8: 4611 mov r1, r2 8000dea: 4618 mov r0, r3 8000dec: f002 fbe6 bl 80035bc <__aeabi_fmul> 8000df0: 4603 mov r3, r0 8000df2: 4619 mov r1, r3 8000df4: 4620 mov r0, r4 8000df6: f002 fad9 bl 80033ac <__addsf3> 8000dfa: 4603 mov r3, r0 8000dfc: 461c mov r4, r3 8000dfe: 6cfb ldr r3, [r7, #76] @ 0x4c 8000e00: 6cfa ldr r2, [r7, #76] @ 0x4c 8000e02: 4611 mov r1, r2 8000e04: 4618 mov r0, r3 8000e06: f002 fbd9 bl 80035bc <__aeabi_fmul> 8000e0a: 4603 mov r3, r0 8000e0c: 4619 mov r1, r3 8000e0e: 4620 mov r0, r4 8000e10: f002 facc bl 80033ac <__addsf3> 8000e14: 4603 mov r3, r0 8000e16: 4618 mov r0, r3 8000e18: f001 ff6a bl 8002cf0 <__aeabi_f2d> 8000e1c: 4602 mov r2, r0 8000e1e: 460b mov r3, r1 8000e20: 4610 mov r0, r2 8000e22: 4619 mov r1, r3 8000e24: f001 f836 bl 8001e94 8000e28: 4602 mov r2, r0 8000e2a: 460b mov r3, r1 8000e2c: 4610 mov r0, r2 8000e2e: 4619 mov r1, r3 8000e30: f002 fa66 bl 8003300 <__aeabi_d2f> 8000e34: 4603 mov r3, r0 8000e36: 61fb str r3, [r7, #28] //向量化 cache.aX = cache.aX / norm; 8000e38: 6c7b ldr r3, [r7, #68] @ 0x44 8000e3a: 69f9 ldr r1, [r7, #28] 8000e3c: 4618 mov r0, r3 8000e3e: f002 fc71 bl 8003724 <__aeabi_fdiv> 8000e42: 4603 mov r3, r0 8000e44: 647b str r3, [r7, #68] @ 0x44 cache.aY = cache.aY / norm; 8000e46: 6cbb ldr r3, [r7, #72] @ 0x48 8000e48: 69f9 ldr r1, [r7, #28] 8000e4a: 4618 mov r0, r3 8000e4c: f002 fc6a bl 8003724 <__aeabi_fdiv> 8000e50: 4603 mov r3, r0 8000e52: 64bb str r3, [r7, #72] @ 0x48 cache.aZ = cache.aZ / norm; 8000e54: 6cfb ldr r3, [r7, #76] @ 0x4c 8000e56: 69f9 ldr r1, [r7, #28] 8000e58: 4618 mov r0, r3 8000e5a: f002 fc63 bl 8003724 <__aeabi_fdiv> 8000e5e: 4603 mov r3, r0 8000e60: 64fb str r3, [r7, #76] @ 0x4c //估计方向的重力 vx = 2 * (g_q1 * g_q3 - g_q0 * g_q2); 8000e62: 4b93 ldr r3, [pc, #588] @ (80010b0 ) 8000e64: 681b ldr r3, [r3, #0] 8000e66: 4a93 ldr r2, [pc, #588] @ (80010b4 ) 8000e68: 6812 ldr r2, [r2, #0] 8000e6a: 4611 mov r1, r2 8000e6c: 4618 mov r0, r3 8000e6e: f002 fba5 bl 80035bc <__aeabi_fmul> 8000e72: 4603 mov r3, r0 8000e74: 461c mov r4, r3 8000e76: 4b90 ldr r3, [pc, #576] @ (80010b8 ) 8000e78: 681b ldr r3, [r3, #0] 8000e7a: 4a90 ldr r2, [pc, #576] @ (80010bc ) 8000e7c: 6812 ldr r2, [r2, #0] 8000e7e: 4611 mov r1, r2 8000e80: 4618 mov r0, r3 8000e82: f002 fb9b bl 80035bc <__aeabi_fmul> 8000e86: 4603 mov r3, r0 8000e88: 4619 mov r1, r3 8000e8a: 4620 mov r0, r4 8000e8c: f002 fa8c bl 80033a8 <__aeabi_fsub> 8000e90: 4603 mov r3, r0 8000e92: 4619 mov r1, r3 8000e94: 4618 mov r0, r3 8000e96: f002 fa89 bl 80033ac <__addsf3> 8000e9a: 4603 mov r3, r0 8000e9c: 61bb str r3, [r7, #24] vy = 2 * (g_q0 * g_q1 + g_q2 * g_q3); 8000e9e: 4b86 ldr r3, [pc, #536] @ (80010b8 ) 8000ea0: 681b ldr r3, [r3, #0] 8000ea2: 4a83 ldr r2, [pc, #524] @ (80010b0 ) 8000ea4: 6812 ldr r2, [r2, #0] 8000ea6: 4611 mov r1, r2 8000ea8: 4618 mov r0, r3 8000eaa: f002 fb87 bl 80035bc <__aeabi_fmul> 8000eae: 4603 mov r3, r0 8000eb0: 461c mov r4, r3 8000eb2: 4b82 ldr r3, [pc, #520] @ (80010bc ) 8000eb4: 681b ldr r3, [r3, #0] 8000eb6: 4a7f ldr r2, [pc, #508] @ (80010b4 ) 8000eb8: 6812 ldr r2, [r2, #0] 8000eba: 4611 mov r1, r2 8000ebc: 4618 mov r0, r3 8000ebe: f002 fb7d bl 80035bc <__aeabi_fmul> 8000ec2: 4603 mov r3, r0 8000ec4: 4619 mov r1, r3 8000ec6: 4620 mov r0, r4 8000ec8: f002 fa70 bl 80033ac <__addsf3> 8000ecc: 4603 mov r3, r0 8000ece: 4619 mov r1, r3 8000ed0: 4618 mov r0, r3 8000ed2: f002 fa6b bl 80033ac <__addsf3> 8000ed6: 4603 mov r3, r0 8000ed8: 617b str r3, [r7, #20] vz = g_q0*g_q0 - g_q1*g_q1 - g_q2*g_q2 + g_q3*g_q3; 8000eda: 4b77 ldr r3, [pc, #476] @ (80010b8 ) 8000edc: 681b ldr r3, [r3, #0] 8000ede: 4a76 ldr r2, [pc, #472] @ (80010b8 ) 8000ee0: 6812 ldr r2, [r2, #0] 8000ee2: 4611 mov r1, r2 8000ee4: 4618 mov r0, r3 8000ee6: f002 fb69 bl 80035bc <__aeabi_fmul> 8000eea: 4603 mov r3, r0 8000eec: 461c mov r4, r3 8000eee: 4b70 ldr r3, [pc, #448] @ (80010b0 ) 8000ef0: 681b ldr r3, [r3, #0] 8000ef2: 4a6f ldr r2, [pc, #444] @ (80010b0 ) 8000ef4: 6812 ldr r2, [r2, #0] 8000ef6: 4611 mov r1, r2 8000ef8: 4618 mov r0, r3 8000efa: f002 fb5f bl 80035bc <__aeabi_fmul> 8000efe: 4603 mov r3, r0 8000f00: 4619 mov r1, r3 8000f02: 4620 mov r0, r4 8000f04: f002 fa50 bl 80033a8 <__aeabi_fsub> 8000f08: 4603 mov r3, r0 8000f0a: 461c mov r4, r3 8000f0c: 4b6b ldr r3, [pc, #428] @ (80010bc ) 8000f0e: 681b ldr r3, [r3, #0] 8000f10: 4a6a ldr r2, [pc, #424] @ (80010bc ) 8000f12: 6812 ldr r2, [r2, #0] 8000f14: 4611 mov r1, r2 8000f16: 4618 mov r0, r3 8000f18: f002 fb50 bl 80035bc <__aeabi_fmul> 8000f1c: 4603 mov r3, r0 8000f1e: 4619 mov r1, r3 8000f20: 4620 mov r0, r4 8000f22: f002 fa41 bl 80033a8 <__aeabi_fsub> 8000f26: 4603 mov r3, r0 8000f28: 461c mov r4, r3 8000f2a: 4b62 ldr r3, [pc, #392] @ (80010b4 ) 8000f2c: 681b ldr r3, [r3, #0] 8000f2e: 4a61 ldr r2, [pc, #388] @ (80010b4 ) 8000f30: 6812 ldr r2, [r2, #0] 8000f32: 4611 mov r1, r2 8000f34: 4618 mov r0, r3 8000f36: f002 fb41 bl 80035bc <__aeabi_fmul> 8000f3a: 4603 mov r3, r0 8000f3c: 4619 mov r1, r3 8000f3e: 4620 mov r0, r4 8000f40: f002 fa34 bl 80033ac <__addsf3> 8000f44: 4603 mov r3, r0 8000f46: 613b str r3, [r7, #16] //错误的领域和方向传感器测量参考方向几件的交叉乘积的总和 ex = (cache.aY * vz - cache.aZ * vy); 8000f48: 6cbb ldr r3, [r7, #72] @ 0x48 8000f4a: 6939 ldr r1, [r7, #16] 8000f4c: 4618 mov r0, r3 8000f4e: f002 fb35 bl 80035bc <__aeabi_fmul> 8000f52: 4603 mov r3, r0 8000f54: 461c mov r4, r3 8000f56: 6cfb ldr r3, [r7, #76] @ 0x4c 8000f58: 6979 ldr r1, [r7, #20] 8000f5a: 4618 mov r0, r3 8000f5c: f002 fb2e bl 80035bc <__aeabi_fmul> 8000f60: 4603 mov r3, r0 8000f62: 4619 mov r1, r3 8000f64: 4620 mov r0, r4 8000f66: f002 fa1f bl 80033a8 <__aeabi_fsub> 8000f6a: 4603 mov r3, r0 8000f6c: 60fb str r3, [r7, #12] ey = (cache.aZ * vx - cache.aX * vz); 8000f6e: 6cfb ldr r3, [r7, #76] @ 0x4c 8000f70: 69b9 ldr r1, [r7, #24] 8000f72: 4618 mov r0, r3 8000f74: f002 fb22 bl 80035bc <__aeabi_fmul> 8000f78: 4603 mov r3, r0 8000f7a: 461c mov r4, r3 8000f7c: 6c7b ldr r3, [r7, #68] @ 0x44 8000f7e: 6939 ldr r1, [r7, #16] 8000f80: 4618 mov r0, r3 8000f82: f002 fb1b bl 80035bc <__aeabi_fmul> 8000f86: 4603 mov r3, r0 8000f88: 4619 mov r1, r3 8000f8a: 4620 mov r0, r4 8000f8c: f002 fa0c bl 80033a8 <__aeabi_fsub> 8000f90: 4603 mov r3, r0 8000f92: 60bb str r3, [r7, #8] ez = (cache.aX * vy - cache.aY * vx); 8000f94: 6c7b ldr r3, [r7, #68] @ 0x44 8000f96: 6979 ldr r1, [r7, #20] 8000f98: 4618 mov r0, r3 8000f9a: f002 fb0f bl 80035bc <__aeabi_fmul> 8000f9e: 4603 mov r3, r0 8000fa0: 461c mov r4, r3 8000fa2: 6cbb ldr r3, [r7, #72] @ 0x48 8000fa4: 69b9 ldr r1, [r7, #24] 8000fa6: 4618 mov r0, r3 8000fa8: f002 fb08 bl 80035bc <__aeabi_fmul> 8000fac: 4603 mov r3, r0 8000fae: 4619 mov r1, r3 8000fb0: 4620 mov r0, r4 8000fb2: f002 f9f9 bl 80033a8 <__aeabi_fsub> 8000fb6: 4603 mov r3, r0 8000fb8: 607b str r3, [r7, #4] //积分误差比例积分增益 g_exInt += ex * Ki; 8000fba: 4941 ldr r1, [pc, #260] @ (80010c0 ) 8000fbc: 68f8 ldr r0, [r7, #12] 8000fbe: f002 fafd bl 80035bc <__aeabi_fmul> 8000fc2: 4603 mov r3, r0 8000fc4: 461a mov r2, r3 8000fc6: 4b3f ldr r3, [pc, #252] @ (80010c4 ) 8000fc8: 681b ldr r3, [r3, #0] 8000fca: 4619 mov r1, r3 8000fcc: 4610 mov r0, r2 8000fce: f002 f9ed bl 80033ac <__addsf3> 8000fd2: 4603 mov r3, r0 8000fd4: 461a mov r2, r3 8000fd6: 4b3b ldr r3, [pc, #236] @ (80010c4 ) 8000fd8: 601a str r2, [r3, #0] g_eyInt += ey * Ki; 8000fda: 4939 ldr r1, [pc, #228] @ (80010c0 ) 8000fdc: 68b8 ldr r0, [r7, #8] 8000fde: f002 faed bl 80035bc <__aeabi_fmul> 8000fe2: 4603 mov r3, r0 8000fe4: 461a mov r2, r3 8000fe6: 4b38 ldr r3, [pc, #224] @ (80010c8 ) 8000fe8: 681b ldr r3, [r3, #0] 8000fea: 4619 mov r1, r3 8000fec: 4610 mov r0, r2 8000fee: f002 f9dd bl 80033ac <__addsf3> 8000ff2: 4603 mov r3, r0 8000ff4: 461a mov r2, r3 8000ff6: 4b34 ldr r3, [pc, #208] @ (80010c8 ) 8000ff8: 601a str r2, [r3, #0] g_ezInt += ez * Ki; 8000ffa: 4931 ldr r1, [pc, #196] @ (80010c0 ) 8000ffc: 6878 ldr r0, [r7, #4] 8000ffe: f002 fadd bl 80035bc <__aeabi_fmul> 8001002: 4603 mov r3, r0 8001004: 461a mov r2, r3 8001006: 4b31 ldr r3, [pc, #196] @ (80010cc ) 8001008: 681b ldr r3, [r3, #0] 800100a: 4619 mov r1, r3 800100c: 4610 mov r0, r2 800100e: f002 f9cd bl 80033ac <__addsf3> 8001012: 4603 mov r3, r0 8001014: 461a mov r2, r3 8001016: 4b2d ldr r3, [pc, #180] @ (80010cc ) 8001018: 601a str r2, [r3, #0] //调整后的陀螺仪测量 cache.gX += Kp * ex + g_exInt; 800101a: 6bbc ldr r4, [r7, #56] @ 0x38 800101c: 492c ldr r1, [pc, #176] @ (80010d0 ) 800101e: 68f8 ldr r0, [r7, #12] 8001020: f002 facc bl 80035bc <__aeabi_fmul> 8001024: 4603 mov r3, r0 8001026: 461a mov r2, r3 8001028: 4b26 ldr r3, [pc, #152] @ (80010c4 ) 800102a: 681b ldr r3, [r3, #0] 800102c: 4619 mov r1, r3 800102e: 4610 mov r0, r2 8001030: f002 f9bc bl 80033ac <__addsf3> 8001034: 4603 mov r3, r0 8001036: 4619 mov r1, r3 8001038: 4620 mov r0, r4 800103a: f002 f9b7 bl 80033ac <__addsf3> 800103e: 4603 mov r3, r0 8001040: 63bb str r3, [r7, #56] @ 0x38 cache.gY += Kp * ey + g_eyInt; 8001042: 6bfc ldr r4, [r7, #60] @ 0x3c 8001044: 4922 ldr r1, [pc, #136] @ (80010d0 ) 8001046: 68b8 ldr r0, [r7, #8] 8001048: f002 fab8 bl 80035bc <__aeabi_fmul> 800104c: 4603 mov r3, r0 800104e: 461a mov r2, r3 8001050: 4b1d ldr r3, [pc, #116] @ (80010c8 ) 8001052: 681b ldr r3, [r3, #0] 8001054: 4619 mov r1, r3 8001056: 4610 mov r0, r2 8001058: f002 f9a8 bl 80033ac <__addsf3> 800105c: 4603 mov r3, r0 800105e: 4619 mov r1, r3 8001060: 4620 mov r0, r4 8001062: f002 f9a3 bl 80033ac <__addsf3> 8001066: 4603 mov r3, r0 8001068: 63fb str r3, [r7, #60] @ 0x3c cache.gZ += Kp * ez + g_ezInt; 800106a: 6c3c ldr r4, [r7, #64] @ 0x40 800106c: 4918 ldr r1, [pc, #96] @ (80010d0 ) 800106e: 6878 ldr r0, [r7, #4] 8001070: f002 faa4 bl 80035bc <__aeabi_fmul> 8001074: 4603 mov r3, r0 8001076: 461a mov r2, r3 8001078: 4b14 ldr r3, [pc, #80] @ (80010cc ) 800107a: 681b ldr r3, [r3, #0] 800107c: 4619 mov r1, r3 800107e: 4610 mov r0, r2 8001080: f002 f994 bl 80033ac <__addsf3> 8001084: 4603 mov r3, r0 8001086: 4619 mov r1, r3 8001088: 4620 mov r0, r4 800108a: f002 f98f bl 80033ac <__addsf3> 800108e: 4603 mov r3, r0 8001090: 643b str r3, [r7, #64] @ 0x40 //整合四元数率和正常化 g_q0 += (-g_q1 * cache.gX - g_q2 * cache.gY - g_q3 * cache.gZ) * halfT; 8001092: 4b07 ldr r3, [pc, #28] @ (80010b0 ) 8001094: 681b ldr r3, [r3, #0] 8001096: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 800109a: 6bba ldr r2, [r7, #56] @ 0x38 800109c: 4611 mov r1, r2 800109e: 4618 mov r0, r3 80010a0: f002 fa8c bl 80035bc <__aeabi_fmul> 80010a4: 4603 mov r3, r0 80010a6: 461c mov r4, r3 80010a8: 6bfb ldr r3, [r7, #60] @ 0x3c 80010aa: 4a04 ldr r2, [pc, #16] @ (80010bc ) 80010ac: 6812 ldr r2, [r2, #0] 80010ae: e011 b.n 80010d4 80010b0: 20000208 .word 0x20000208 80010b4: 2000020c .word 0x2000020c 80010b8: 2000006c .word 0x2000006c 80010bc: 20000210 .word 0x20000210 80010c0: 3b03126f .word 0x3b03126f 80010c4: 20000214 .word 0x20000214 80010c8: 20000218 .word 0x20000218 80010cc: 2000021c .word 0x2000021c 80010d0: 42c80000 .word 0x42c80000 80010d4: 4611 mov r1, r2 80010d6: 4618 mov r0, r3 80010d8: f002 fa70 bl 80035bc <__aeabi_fmul> 80010dc: 4603 mov r3, r0 80010de: 4619 mov r1, r3 80010e0: 4620 mov r0, r4 80010e2: f002 f961 bl 80033a8 <__aeabi_fsub> 80010e6: 4603 mov r3, r0 80010e8: 461c mov r4, r3 80010ea: 6c3b ldr r3, [r7, #64] @ 0x40 80010ec: 4a93 ldr r2, [pc, #588] @ (800133c ) 80010ee: 6812 ldr r2, [r2, #0] 80010f0: 4611 mov r1, r2 80010f2: 4618 mov r0, r3 80010f4: f002 fa62 bl 80035bc <__aeabi_fmul> 80010f8: 4603 mov r3, r0 80010fa: 4619 mov r1, r3 80010fc: 4620 mov r0, r4 80010fe: f002 f953 bl 80033a8 <__aeabi_fsub> 8001102: 4603 mov r3, r0 8001104: 498e ldr r1, [pc, #568] @ (8001340 ) 8001106: 4618 mov r0, r3 8001108: f002 fa58 bl 80035bc <__aeabi_fmul> 800110c: 4603 mov r3, r0 800110e: 461a mov r2, r3 8001110: 4b8c ldr r3, [pc, #560] @ (8001344 ) 8001112: 681b ldr r3, [r3, #0] 8001114: 4619 mov r1, r3 8001116: 4610 mov r0, r2 8001118: f002 f948 bl 80033ac <__addsf3> 800111c: 4603 mov r3, r0 800111e: 461a mov r2, r3 8001120: 4b88 ldr r3, [pc, #544] @ (8001344 ) 8001122: 601a str r2, [r3, #0] g_q1 += (g_q0 * cache.gX + g_q2 * cache.gZ - g_q3 * cache.gY) * halfT; 8001124: 6bbb ldr r3, [r7, #56] @ 0x38 8001126: 4a87 ldr r2, [pc, #540] @ (8001344 ) 8001128: 6812 ldr r2, [r2, #0] 800112a: 4611 mov r1, r2 800112c: 4618 mov r0, r3 800112e: f002 fa45 bl 80035bc <__aeabi_fmul> 8001132: 4603 mov r3, r0 8001134: 461c mov r4, r3 8001136: 6c3b ldr r3, [r7, #64] @ 0x40 8001138: 4a83 ldr r2, [pc, #524] @ (8001348 ) 800113a: 6812 ldr r2, [r2, #0] 800113c: 4611 mov r1, r2 800113e: 4618 mov r0, r3 8001140: f002 fa3c bl 80035bc <__aeabi_fmul> 8001144: 4603 mov r3, r0 8001146: 4619 mov r1, r3 8001148: 4620 mov r0, r4 800114a: f002 f92f bl 80033ac <__addsf3> 800114e: 4603 mov r3, r0 8001150: 461c mov r4, r3 8001152: 6bfb ldr r3, [r7, #60] @ 0x3c 8001154: 4a79 ldr r2, [pc, #484] @ (800133c ) 8001156: 6812 ldr r2, [r2, #0] 8001158: 4611 mov r1, r2 800115a: 4618 mov r0, r3 800115c: f002 fa2e bl 80035bc <__aeabi_fmul> 8001160: 4603 mov r3, r0 8001162: 4619 mov r1, r3 8001164: 4620 mov r0, r4 8001166: f002 f91f bl 80033a8 <__aeabi_fsub> 800116a: 4603 mov r3, r0 800116c: 4974 ldr r1, [pc, #464] @ (8001340 ) 800116e: 4618 mov r0, r3 8001170: f002 fa24 bl 80035bc <__aeabi_fmul> 8001174: 4603 mov r3, r0 8001176: 461a mov r2, r3 8001178: 4b74 ldr r3, [pc, #464] @ (800134c ) 800117a: 681b ldr r3, [r3, #0] 800117c: 4619 mov r1, r3 800117e: 4610 mov r0, r2 8001180: f002 f914 bl 80033ac <__addsf3> 8001184: 4603 mov r3, r0 8001186: 461a mov r2, r3 8001188: 4b70 ldr r3, [pc, #448] @ (800134c ) 800118a: 601a str r2, [r3, #0] g_q2 += (g_q0 * cache.gY - g_q1 * cache.gZ + g_q3 * cache.gX) * halfT; 800118c: 6bfb ldr r3, [r7, #60] @ 0x3c 800118e: 4a6d ldr r2, [pc, #436] @ (8001344 ) 8001190: 6812 ldr r2, [r2, #0] 8001192: 4611 mov r1, r2 8001194: 4618 mov r0, r3 8001196: f002 fa11 bl 80035bc <__aeabi_fmul> 800119a: 4603 mov r3, r0 800119c: 461c mov r4, r3 800119e: 6c3b ldr r3, [r7, #64] @ 0x40 80011a0: 4a6a ldr r2, [pc, #424] @ (800134c ) 80011a2: 6812 ldr r2, [r2, #0] 80011a4: 4611 mov r1, r2 80011a6: 4618 mov r0, r3 80011a8: f002 fa08 bl 80035bc <__aeabi_fmul> 80011ac: 4603 mov r3, r0 80011ae: 4619 mov r1, r3 80011b0: 4620 mov r0, r4 80011b2: f002 f8f9 bl 80033a8 <__aeabi_fsub> 80011b6: 4603 mov r3, r0 80011b8: 461c mov r4, r3 80011ba: 6bbb ldr r3, [r7, #56] @ 0x38 80011bc: 4a5f ldr r2, [pc, #380] @ (800133c ) 80011be: 6812 ldr r2, [r2, #0] 80011c0: 4611 mov r1, r2 80011c2: 4618 mov r0, r3 80011c4: f002 f9fa bl 80035bc <__aeabi_fmul> 80011c8: 4603 mov r3, r0 80011ca: 4619 mov r1, r3 80011cc: 4620 mov r0, r4 80011ce: f002 f8ed bl 80033ac <__addsf3> 80011d2: 4603 mov r3, r0 80011d4: 495a ldr r1, [pc, #360] @ (8001340 ) 80011d6: 4618 mov r0, r3 80011d8: f002 f9f0 bl 80035bc <__aeabi_fmul> 80011dc: 4603 mov r3, r0 80011de: 461a mov r2, r3 80011e0: 4b59 ldr r3, [pc, #356] @ (8001348 ) 80011e2: 681b ldr r3, [r3, #0] 80011e4: 4619 mov r1, r3 80011e6: 4610 mov r0, r2 80011e8: f002 f8e0 bl 80033ac <__addsf3> 80011ec: 4603 mov r3, r0 80011ee: 461a mov r2, r3 80011f0: 4b55 ldr r3, [pc, #340] @ (8001348 ) 80011f2: 601a str r2, [r3, #0] g_q3 += (g_q0 * cache.gZ + g_q1 * cache.gY - g_q2 * cache.gX) * halfT; 80011f4: 6c3b ldr r3, [r7, #64] @ 0x40 80011f6: 4a53 ldr r2, [pc, #332] @ (8001344 ) 80011f8: 6812 ldr r2, [r2, #0] 80011fa: 4611 mov r1, r2 80011fc: 4618 mov r0, r3 80011fe: f002 f9dd bl 80035bc <__aeabi_fmul> 8001202: 4603 mov r3, r0 8001204: 461c mov r4, r3 8001206: 6bfb ldr r3, [r7, #60] @ 0x3c 8001208: 4a50 ldr r2, [pc, #320] @ (800134c ) 800120a: 6812 ldr r2, [r2, #0] 800120c: 4611 mov r1, r2 800120e: 4618 mov r0, r3 8001210: f002 f9d4 bl 80035bc <__aeabi_fmul> 8001214: 4603 mov r3, r0 8001216: 4619 mov r1, r3 8001218: 4620 mov r0, r4 800121a: f002 f8c7 bl 80033ac <__addsf3> 800121e: 4603 mov r3, r0 8001220: 461c mov r4, r3 8001222: 6bbb ldr r3, [r7, #56] @ 0x38 8001224: 4a48 ldr r2, [pc, #288] @ (8001348 ) 8001226: 6812 ldr r2, [r2, #0] 8001228: 4611 mov r1, r2 800122a: 4618 mov r0, r3 800122c: f002 f9c6 bl 80035bc <__aeabi_fmul> 8001230: 4603 mov r3, r0 8001232: 4619 mov r1, r3 8001234: 4620 mov r0, r4 8001236: f002 f8b7 bl 80033a8 <__aeabi_fsub> 800123a: 4603 mov r3, r0 800123c: 4940 ldr r1, [pc, #256] @ (8001340 ) 800123e: 4618 mov r0, r3 8001240: f002 f9bc bl 80035bc <__aeabi_fmul> 8001244: 4603 mov r3, r0 8001246: 461a mov r2, r3 8001248: 4b3c ldr r3, [pc, #240] @ (800133c ) 800124a: 681b ldr r3, [r3, #0] 800124c: 4619 mov r1, r3 800124e: 4610 mov r0, r2 8001250: f002 f8ac bl 80033ac <__addsf3> 8001254: 4603 mov r3, r0 8001256: 461a mov r2, r3 8001258: 4b38 ldr r3, [pc, #224] @ (800133c ) 800125a: 601a str r2, [r3, #0] //正常化四元 norm = sqrt(g_q0*g_q0 + g_q1*g_q1 + g_q2*g_q2 + g_q3*g_q3); 800125c: 4b39 ldr r3, [pc, #228] @ (8001344 ) 800125e: 681b ldr r3, [r3, #0] 8001260: 4a38 ldr r2, [pc, #224] @ (8001344 ) 8001262: 6812 ldr r2, [r2, #0] 8001264: 4611 mov r1, r2 8001266: 4618 mov r0, r3 8001268: f002 f9a8 bl 80035bc <__aeabi_fmul> 800126c: 4603 mov r3, r0 800126e: 461c mov r4, r3 8001270: 4b36 ldr r3, [pc, #216] @ (800134c ) 8001272: 681b ldr r3, [r3, #0] 8001274: 4a35 ldr r2, [pc, #212] @ (800134c ) 8001276: 6812 ldr r2, [r2, #0] 8001278: 4611 mov r1, r2 800127a: 4618 mov r0, r3 800127c: f002 f99e bl 80035bc <__aeabi_fmul> 8001280: 4603 mov r3, r0 8001282: 4619 mov r1, r3 8001284: 4620 mov r0, r4 8001286: f002 f891 bl 80033ac <__addsf3> 800128a: 4603 mov r3, r0 800128c: 461c mov r4, r3 800128e: 4b2e ldr r3, [pc, #184] @ (8001348 ) 8001290: 681b ldr r3, [r3, #0] 8001292: 4a2d ldr r2, [pc, #180] @ (8001348 ) 8001294: 6812 ldr r2, [r2, #0] 8001296: 4611 mov r1, r2 8001298: 4618 mov r0, r3 800129a: f002 f98f bl 80035bc <__aeabi_fmul> 800129e: 4603 mov r3, r0 80012a0: 4619 mov r1, r3 80012a2: 4620 mov r0, r4 80012a4: f002 f882 bl 80033ac <__addsf3> 80012a8: 4603 mov r3, r0 80012aa: 461c mov r4, r3 80012ac: 4b23 ldr r3, [pc, #140] @ (800133c ) 80012ae: 681b ldr r3, [r3, #0] 80012b0: 4a22 ldr r2, [pc, #136] @ (800133c ) 80012b2: 6812 ldr r2, [r2, #0] 80012b4: 4611 mov r1, r2 80012b6: 4618 mov r0, r3 80012b8: f002 f980 bl 80035bc <__aeabi_fmul> 80012bc: 4603 mov r3, r0 80012be: 4619 mov r1, r3 80012c0: 4620 mov r0, r4 80012c2: f002 f873 bl 80033ac <__addsf3> 80012c6: 4603 mov r3, r0 80012c8: 4618 mov r0, r3 80012ca: f001 fd11 bl 8002cf0 <__aeabi_f2d> 80012ce: 4602 mov r2, r0 80012d0: 460b mov r3, r1 80012d2: 4610 mov r0, r2 80012d4: 4619 mov r1, r3 80012d6: f000 fddd bl 8001e94 80012da: 4602 mov r2, r0 80012dc: 460b mov r3, r1 80012de: 4610 mov r0, r2 80012e0: 4619 mov r1, r3 80012e2: f002 f80d bl 8003300 <__aeabi_d2f> 80012e6: 4603 mov r3, r0 80012e8: 61fb str r3, [r7, #28] g_q0 = g_q0 / norm; 80012ea: 4b16 ldr r3, [pc, #88] @ (8001344 ) 80012ec: 681b ldr r3, [r3, #0] 80012ee: 69f9 ldr r1, [r7, #28] 80012f0: 4618 mov r0, r3 80012f2: f002 fa17 bl 8003724 <__aeabi_fdiv> 80012f6: 4603 mov r3, r0 80012f8: 461a mov r2, r3 80012fa: 4b12 ldr r3, [pc, #72] @ (8001344 ) 80012fc: 601a str r2, [r3, #0] g_q1 = g_q1 / norm; 80012fe: 4b13 ldr r3, [pc, #76] @ (800134c ) 8001300: 681b ldr r3, [r3, #0] 8001302: 69f9 ldr r1, [r7, #28] 8001304: 4618 mov r0, r3 8001306: f002 fa0d bl 8003724 <__aeabi_fdiv> 800130a: 4603 mov r3, r0 800130c: 461a mov r2, r3 800130e: 4b0f ldr r3, [pc, #60] @ (800134c ) 8001310: 601a str r2, [r3, #0] g_q2 = g_q2 / norm; 8001312: 4b0d ldr r3, [pc, #52] @ (8001348 ) 8001314: 681b ldr r3, [r3, #0] 8001316: 69f9 ldr r1, [r7, #28] 8001318: 4618 mov r0, r3 800131a: f002 fa03 bl 8003724 <__aeabi_fdiv> 800131e: 4603 mov r3, r0 8001320: 461a mov r2, r3 8001322: 4b09 ldr r3, [pc, #36] @ (8001348 ) 8001324: 601a str r2, [r3, #0] g_q3 = g_q3 / norm; 8001326: 4b05 ldr r3, [pc, #20] @ (800133c ) 8001328: 681b ldr r3, [r3, #0] 800132a: 69f9 ldr r1, [r7, #28] 800132c: 4618 mov r0, r3 800132e: f002 f9f9 bl 8003724 <__aeabi_fdiv> 8001332: 4603 mov r3, r0 8001334: 461a mov r2, r3 8001336: 4b01 ldr r3, [pc, #4] @ (800133c ) 8001338: 601a str r2, [r3, #0] 800133a: e009 b.n 8001350 800133c: 2000020c .word 0x2000020c 8001340: 3a83126f .word 0x3a83126f 8001344: 2000006c .word 0x2000006c 8001348: 20000210 .word 0x20000210 800134c: 20000208 .word 0x20000208 g_Pitch = asin(-2 * g_q1 * g_q3 + 2 * g_q0 * g_q2) * 57.3; 8001350: 4b91 ldr r3, [pc, #580] @ (8001598 ) 8001352: 681b ldr r3, [r3, #0] 8001354: f04f 4140 mov.w r1, #3221225472 @ 0xc0000000 8001358: 4618 mov r0, r3 800135a: f002 f92f bl 80035bc <__aeabi_fmul> 800135e: 4603 mov r3, r0 8001360: 461a mov r2, r3 8001362: 4b8e ldr r3, [pc, #568] @ (800159c ) 8001364: 681b ldr r3, [r3, #0] 8001366: 4619 mov r1, r3 8001368: 4610 mov r0, r2 800136a: f002 f927 bl 80035bc <__aeabi_fmul> 800136e: 4603 mov r3, r0 8001370: 461c mov r4, r3 8001372: 4b8b ldr r3, [pc, #556] @ (80015a0 ) 8001374: 681b ldr r3, [r3, #0] 8001376: 4619 mov r1, r3 8001378: 4618 mov r0, r3 800137a: f002 f817 bl 80033ac <__addsf3> 800137e: 4603 mov r3, r0 8001380: 461a mov r2, r3 8001382: 4b88 ldr r3, [pc, #544] @ (80015a4 ) 8001384: 681b ldr r3, [r3, #0] 8001386: 4619 mov r1, r3 8001388: 4610 mov r0, r2 800138a: f002 f917 bl 80035bc <__aeabi_fmul> 800138e: 4603 mov r3, r0 8001390: 4619 mov r1, r3 8001392: 4620 mov r0, r4 8001394: f002 f80a bl 80033ac <__addsf3> 8001398: 4603 mov r3, r0 800139a: 4618 mov r0, r3 800139c: f001 fca8 bl 8002cf0 <__aeabi_f2d> 80013a0: 4602 mov r2, r0 80013a2: 460b mov r3, r1 80013a4: 4610 mov r0, r2 80013a6: 4619 mov r1, r3 80013a8: f000 ff4e bl 8002248 80013ac: a378 add r3, pc, #480 @ (adr r3, 8001590 ) 80013ae: e9d3 2300 ldrd r2, r3, [r3] 80013b2: f001 fcf5 bl 8002da0 <__aeabi_dmul> 80013b6: 4602 mov r2, r0 80013b8: 460b mov r3, r1 80013ba: 4610 mov r0, r2 80013bc: 4619 mov r1, r3 80013be: f001 ff9f bl 8003300 <__aeabi_d2f> 80013c2: 4603 mov r3, r0 80013c4: 4a78 ldr r2, [pc, #480] @ (80015a8 ) 80013c6: 6013 str r3, [r2, #0] g_Roll = atan2(2 * g_q2 * g_q3 + 2 * g_q0 * g_q1, -2 * g_q1*g_q1 - 2 * g_q2*g_q2 + 1) * 57.3; 80013c8: 4b76 ldr r3, [pc, #472] @ (80015a4 ) 80013ca: 681b ldr r3, [r3, #0] 80013cc: 4619 mov r1, r3 80013ce: 4618 mov r0, r3 80013d0: f001 ffec bl 80033ac <__addsf3> 80013d4: 4603 mov r3, r0 80013d6: 461a mov r2, r3 80013d8: 4b70 ldr r3, [pc, #448] @ (800159c ) 80013da: 681b ldr r3, [r3, #0] 80013dc: 4619 mov r1, r3 80013de: 4610 mov r0, r2 80013e0: f002 f8ec bl 80035bc <__aeabi_fmul> 80013e4: 4603 mov r3, r0 80013e6: 461c mov r4, r3 80013e8: 4b6d ldr r3, [pc, #436] @ (80015a0 ) 80013ea: 681b ldr r3, [r3, #0] 80013ec: 4619 mov r1, r3 80013ee: 4618 mov r0, r3 80013f0: f001 ffdc bl 80033ac <__addsf3> 80013f4: 4603 mov r3, r0 80013f6: 461a mov r2, r3 80013f8: 4b67 ldr r3, [pc, #412] @ (8001598 ) 80013fa: 681b ldr r3, [r3, #0] 80013fc: 4619 mov r1, r3 80013fe: 4610 mov r0, r2 8001400: f002 f8dc bl 80035bc <__aeabi_fmul> 8001404: 4603 mov r3, r0 8001406: 4619 mov r1, r3 8001408: 4620 mov r0, r4 800140a: f001 ffcf bl 80033ac <__addsf3> 800140e: 4603 mov r3, r0 8001410: 4618 mov r0, r3 8001412: f001 fc6d bl 8002cf0 <__aeabi_f2d> 8001416: 4604 mov r4, r0 8001418: 460d mov r5, r1 800141a: 4b5f ldr r3, [pc, #380] @ (8001598 ) 800141c: 681b ldr r3, [r3, #0] 800141e: f04f 4140 mov.w r1, #3221225472 @ 0xc0000000 8001422: 4618 mov r0, r3 8001424: f002 f8ca bl 80035bc <__aeabi_fmul> 8001428: 4603 mov r3, r0 800142a: 461a mov r2, r3 800142c: 4b5a ldr r3, [pc, #360] @ (8001598 ) 800142e: 681b ldr r3, [r3, #0] 8001430: 4619 mov r1, r3 8001432: 4610 mov r0, r2 8001434: f002 f8c2 bl 80035bc <__aeabi_fmul> 8001438: 4603 mov r3, r0 800143a: 461e mov r6, r3 800143c: 4b59 ldr r3, [pc, #356] @ (80015a4 ) 800143e: 681b ldr r3, [r3, #0] 8001440: 4619 mov r1, r3 8001442: 4618 mov r0, r3 8001444: f001 ffb2 bl 80033ac <__addsf3> 8001448: 4603 mov r3, r0 800144a: 461a mov r2, r3 800144c: 4b55 ldr r3, [pc, #340] @ (80015a4 ) 800144e: 681b ldr r3, [r3, #0] 8001450: 4619 mov r1, r3 8001452: 4610 mov r0, r2 8001454: f002 f8b2 bl 80035bc <__aeabi_fmul> 8001458: 4603 mov r3, r0 800145a: 4619 mov r1, r3 800145c: 4630 mov r0, r6 800145e: f001 ffa3 bl 80033a8 <__aeabi_fsub> 8001462: 4603 mov r3, r0 8001464: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 8001468: 4618 mov r0, r3 800146a: f001 ff9f bl 80033ac <__addsf3> 800146e: 4603 mov r3, r0 8001470: 4618 mov r0, r3 8001472: f001 fc3d bl 8002cf0 <__aeabi_f2d> 8001476: 4602 mov r2, r0 8001478: 460b mov r3, r1 800147a: 4620 mov r0, r4 800147c: 4629 mov r1, r5 800147e: f000 fd07 bl 8001e90 8001482: a343 add r3, pc, #268 @ (adr r3, 8001590 ) 8001484: e9d3 2300 ldrd r2, r3, [r3] 8001488: f001 fc8a bl 8002da0 <__aeabi_dmul> 800148c: 4602 mov r2, r0 800148e: 460b mov r3, r1 8001490: 4610 mov r0, r2 8001492: 4619 mov r1, r3 8001494: f001 ff34 bl 8003300 <__aeabi_d2f> 8001498: 4603 mov r3, r0 800149a: 4a44 ldr r2, [pc, #272] @ (80015ac ) 800149c: 6013 str r3, [r2, #0] g_Yaw = atan2(2 * (g_q1 * g_q2 + g_q0 * g_q3), g_q0*g_q0 + g_q1*g_q1 - g_q2*g_q2 - g_q3*g_q3) * 57.3; 800149e: 4b3e ldr r3, [pc, #248] @ (8001598 ) 80014a0: 681b ldr r3, [r3, #0] 80014a2: 4a40 ldr r2, [pc, #256] @ (80015a4 ) 80014a4: 6812 ldr r2, [r2, #0] 80014a6: 4611 mov r1, r2 80014a8: 4618 mov r0, r3 80014aa: f002 f887 bl 80035bc <__aeabi_fmul> 80014ae: 4603 mov r3, r0 80014b0: 461c mov r4, r3 80014b2: 4b3b ldr r3, [pc, #236] @ (80015a0 ) 80014b4: 681b ldr r3, [r3, #0] 80014b6: 4a39 ldr r2, [pc, #228] @ (800159c ) 80014b8: 6812 ldr r2, [r2, #0] 80014ba: 4611 mov r1, r2 80014bc: 4618 mov r0, r3 80014be: f002 f87d bl 80035bc <__aeabi_fmul> 80014c2: 4603 mov r3, r0 80014c4: 4619 mov r1, r3 80014c6: 4620 mov r0, r4 80014c8: f001 ff70 bl 80033ac <__addsf3> 80014cc: 4603 mov r3, r0 80014ce: 4619 mov r1, r3 80014d0: 4618 mov r0, r3 80014d2: f001 ff6b bl 80033ac <__addsf3> 80014d6: 4603 mov r3, r0 80014d8: 4618 mov r0, r3 80014da: f001 fc09 bl 8002cf0 <__aeabi_f2d> 80014de: 4604 mov r4, r0 80014e0: 460d mov r5, r1 80014e2: 4b2f ldr r3, [pc, #188] @ (80015a0 ) 80014e4: 681b ldr r3, [r3, #0] 80014e6: 4a2e ldr r2, [pc, #184] @ (80015a0 ) 80014e8: 6812 ldr r2, [r2, #0] 80014ea: 4611 mov r1, r2 80014ec: 4618 mov r0, r3 80014ee: f002 f865 bl 80035bc <__aeabi_fmul> 80014f2: 4603 mov r3, r0 80014f4: 461e mov r6, r3 80014f6: 4b28 ldr r3, [pc, #160] @ (8001598 ) 80014f8: 681b ldr r3, [r3, #0] 80014fa: 4a27 ldr r2, [pc, #156] @ (8001598 ) 80014fc: 6812 ldr r2, [r2, #0] 80014fe: 4611 mov r1, r2 8001500: 4618 mov r0, r3 8001502: f002 f85b bl 80035bc <__aeabi_fmul> 8001506: 4603 mov r3, r0 8001508: 4619 mov r1, r3 800150a: 4630 mov r0, r6 800150c: f001 ff4e bl 80033ac <__addsf3> 8001510: 4603 mov r3, r0 8001512: 461e mov r6, r3 8001514: 4b23 ldr r3, [pc, #140] @ (80015a4 ) 8001516: 681b ldr r3, [r3, #0] 8001518: 4a22 ldr r2, [pc, #136] @ (80015a4 ) 800151a: 6812 ldr r2, [r2, #0] 800151c: 4611 mov r1, r2 800151e: 4618 mov r0, r3 8001520: f002 f84c bl 80035bc <__aeabi_fmul> 8001524: 4603 mov r3, r0 8001526: 4619 mov r1, r3 8001528: 4630 mov r0, r6 800152a: f001 ff3d bl 80033a8 <__aeabi_fsub> 800152e: 4603 mov r3, r0 8001530: 461e mov r6, r3 8001532: 4b1a ldr r3, [pc, #104] @ (800159c ) 8001534: 681b ldr r3, [r3, #0] 8001536: 4a19 ldr r2, [pc, #100] @ (800159c ) 8001538: 6812 ldr r2, [r2, #0] 800153a: 4611 mov r1, r2 800153c: 4618 mov r0, r3 800153e: f002 f83d bl 80035bc <__aeabi_fmul> 8001542: 4603 mov r3, r0 8001544: 4619 mov r1, r3 8001546: 4630 mov r0, r6 8001548: f001 ff2e bl 80033a8 <__aeabi_fsub> 800154c: 4603 mov r3, r0 800154e: 4618 mov r0, r3 8001550: f001 fbce bl 8002cf0 <__aeabi_f2d> 8001554: 4602 mov r2, r0 8001556: 460b mov r3, r1 8001558: 4620 mov r0, r4 800155a: 4629 mov r1, r5 800155c: f000 fc98 bl 8001e90 8001560: a30b add r3, pc, #44 @ (adr r3, 8001590 ) 8001562: e9d3 2300 ldrd r2, r3, [r3] 8001566: f001 fc1b bl 8002da0 <__aeabi_dmul> 800156a: 4602 mov r2, r0 800156c: 460b mov r3, r1 800156e: 4610 mov r0, r2 8001570: 4619 mov r1, r3 8001572: f001 fec5 bl 8003300 <__aeabi_d2f> 8001576: 4603 mov r3, r0 8001578: 4a0d ldr r2, [pc, #52] @ (80015b0 ) 800157a: 6013 str r3, [r2, #0] } 800157c: bf00 nop 800157e: 3724 adds r7, #36 @ 0x24 8001580: 46bd mov sp, r7 8001582: e8bd 40f0 ldmia.w sp!, {r4, r5, r6, r7, lr} 8001586: b004 add sp, #16 8001588: 4770 bx lr 800158a: bf00 nop 800158c: f3af 8000 nop.w 8001590: 66666666 .word 0x66666666 8001594: 404ca666 .word 0x404ca666 8001598: 20000208 .word 0x20000208 800159c: 2000020c .word 0x2000020c 80015a0: 2000006c .word 0x2000006c 80015a4: 20000210 .word 0x20000210 80015a8: 200001e8 .word 0x200001e8 80015ac: 200001ec .word 0x200001ec 80015b0: 200001e4 .word 0x200001e4 080015b4 : The function enables a device-specific interrupt in the NVIC interrupt controller. \param [in] IRQn External interrupt number. Value cannot be negative. */ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) { 80015b4: b480 push {r7} 80015b6: b083 sub sp, #12 80015b8: af00 add r7, sp, #0 80015ba: 4603 mov r3, r0 80015bc: 71fb strb r3, [r7, #7] NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ 80015be: 79fb ldrb r3, [r7, #7] 80015c0: f003 031f and.w r3, r3, #31 80015c4: 2201 movs r2, #1 80015c6: fa02 f103 lsl.w r1, r2, r3 80015ca: 4a05 ldr r2, [pc, #20] @ (80015e0 ) 80015cc: f997 3007 ldrsb.w r3, [r7, #7] 80015d0: 095b lsrs r3, r3, #5 80015d2: f842 1023 str.w r1, [r2, r3, lsl #2] } 80015d6: bf00 nop 80015d8: 370c adds r7, #12 80015da: 46bd mov sp, r7 80015dc: bc80 pop {r7} 80015de: 4770 bx lr 80015e0: e000e100 .word 0xe000e100 080015e4 : \param [in] IRQn Interrupt number. \param [in] priority Priority to set. */ __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 80015e4: b480 push {r7} 80015e6: b083 sub sp, #12 80015e8: af00 add r7, sp, #0 80015ea: 4603 mov r3, r0 80015ec: 6039 str r1, [r7, #0] 80015ee: 71fb strb r3, [r7, #7] if(IRQn < 0) { 80015f0: f997 3007 ldrsb.w r3, [r7, #7] 80015f4: 2b00 cmp r3, #0 80015f6: da0b bge.n 8001610 SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */ 80015f8: 683b ldr r3, [r7, #0] 80015fa: b2da uxtb r2, r3 80015fc: 490c ldr r1, [pc, #48] @ (8001630 ) 80015fe: 79fb ldrb r3, [r7, #7] 8001600: f003 030f and.w r3, r3, #15 8001604: 3b04 subs r3, #4 8001606: 0112 lsls r2, r2, #4 8001608: b2d2 uxtb r2, r2 800160a: 440b add r3, r1 800160c: 761a strb r2, [r3, #24] else { NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ } 800160e: e009 b.n 8001624 NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ 8001610: 683b ldr r3, [r7, #0] 8001612: b2da uxtb r2, r3 8001614: 4907 ldr r1, [pc, #28] @ (8001634 ) 8001616: f997 3007 ldrsb.w r3, [r7, #7] 800161a: 0112 lsls r2, r2, #4 800161c: b2d2 uxtb r2, r2 800161e: 440b add r3, r1 8001620: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 8001624: bf00 nop 8001626: 370c adds r7, #12 8001628: 46bd mov sp, r7 800162a: bc80 pop {r7} 800162c: 4770 bx lr 800162e: bf00 nop 8001630: e000ed00 .word 0xe000ed00 8001634: e000e100 .word 0xe000e100 08001638 : NULL, NULL }; static unsigned char avm_uart_init(void *conf) { 8001638: b580 push {r7, lr} 800163a: b082 sub sp, #8 800163c: af00 add r7, sp, #0 800163e: 6078 str r0, [r7, #4] uart_init(((unsigned int *)conf)[0], ((unsigned int *)conf)[1]); 8001640: 687b ldr r3, [r7, #4] 8001642: 681a ldr r2, [r3, #0] 8001644: 687b ldr r3, [r7, #4] 8001646: 3304 adds r3, #4 8001648: 681b ldr r3, [r3, #0] 800164a: 4619 mov r1, r3 800164c: 4610 mov r0, r2 800164e: f000 f805 bl 800165c return 0; 8001652: 2300 movs r3, #0 } 8001654: 4618 mov r0, r3 8001656: 3708 adds r7, #8 8001658: 46bd mov sp, r7 800165a: bd80 pop {r7, pc} 0800165c : void uart_init(unsigned int pclk2, unsigned int bound) { 800165c: b590 push {r4, r7, lr} 800165e: b085 sub sp, #20 8001660: af00 add r7, sp, #0 8001662: 6078 str r0, [r7, #4] 8001664: 6039 str r1, [r7, #0] float temp; unsigned short mantissa; unsigned short fraction; temp = (float)(pclk2*1000000)/(bound*16); 8001666: 687b ldr r3, [r7, #4] 8001668: 4a40 ldr r2, [pc, #256] @ (800176c ) 800166a: fb02 f303 mul.w r3, r2, r3 800166e: 4618 mov r0, r3 8001670: f001 ff4c bl 800350c <__aeabi_ui2f> 8001674: 4604 mov r4, r0 8001676: 683b ldr r3, [r7, #0] 8001678: 011b lsls r3, r3, #4 800167a: 4618 mov r0, r3 800167c: f001 ff46 bl 800350c <__aeabi_ui2f> 8001680: 4603 mov r3, r0 8001682: 4619 mov r1, r3 8001684: 4620 mov r0, r4 8001686: f002 f84d bl 8003724 <__aeabi_fdiv> 800168a: 4603 mov r3, r0 800168c: 60fb str r3, [r7, #12] mantissa = temp; 800168e: 68f8 ldr r0, [r7, #12] 8001690: f002 f980 bl 8003994 <__aeabi_f2uiz> 8001694: 4603 mov r3, r0 8001696: 817b strh r3, [r7, #10] fraction = (temp - mantissa) * 16; 8001698: 897b ldrh r3, [r7, #10] 800169a: 4618 mov r0, r3 800169c: f001 ff3a bl 8003514 <__aeabi_i2f> 80016a0: 4603 mov r3, r0 80016a2: 4619 mov r1, r3 80016a4: 68f8 ldr r0, [r7, #12] 80016a6: f001 fe7f bl 80033a8 <__aeabi_fsub> 80016aa: 4603 mov r3, r0 80016ac: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 80016b0: 4618 mov r0, r3 80016b2: f001 ff83 bl 80035bc <__aeabi_fmul> 80016b6: 4603 mov r3, r0 80016b8: 4618 mov r0, r3 80016ba: f002 f96b bl 8003994 <__aeabi_f2uiz> 80016be: 4603 mov r3, r0 80016c0: 813b strh r3, [r7, #8] mantissa <<= 4; 80016c2: 897b ldrh r3, [r7, #10] 80016c4: 011b lsls r3, r3, #4 80016c6: 817b strh r3, [r7, #10] mantissa += fraction; 80016c8: 897a ldrh r2, [r7, #10] 80016ca: 893b ldrh r3, [r7, #8] 80016cc: 4413 add r3, r2 80016ce: 817b strh r3, [r7, #10] RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //GPIOA Enable 80016d0: 4b27 ldr r3, [pc, #156] @ (8001770 ) 80016d2: 699b ldr r3, [r3, #24] 80016d4: 4a26 ldr r2, [pc, #152] @ (8001770 ) 80016d6: f043 0304 orr.w r3, r3, #4 80016da: 6193 str r3, [r2, #24] RCC->APB2ENR |= RCC_APB2ENR_USART1EN; //USART1 Enable 80016dc: 4b24 ldr r3, [pc, #144] @ (8001770 ) 80016de: 699b ldr r3, [r3, #24] 80016e0: 4a23 ldr r2, [pc, #140] @ (8001770 ) 80016e2: f443 4380 orr.w r3, r3, #16384 @ 0x4000 80016e6: 6193 str r3, [r2, #24] GPIOA->CRH &= 0xFFFFF00F; 80016e8: 4b22 ldr r3, [pc, #136] @ (8001774 ) 80016ea: 685b ldr r3, [r3, #4] 80016ec: 4a21 ldr r2, [pc, #132] @ (8001774 ) 80016ee: f423 637f bic.w r3, r3, #4080 @ 0xff0 80016f2: 6053 str r3, [r2, #4] GPIOA->CRH |= 0x000008B0; 80016f4: 4b1f ldr r3, [pc, #124] @ (8001774 ) 80016f6: 685b ldr r3, [r3, #4] 80016f8: 4a1e ldr r2, [pc, #120] @ (8001774 ) 80016fa: f443 630b orr.w r3, r3, #2224 @ 0x8b0 80016fe: 6053 str r3, [r2, #4] RCC->APB2RSTR |= RCC_APB2RSTR_USART1RST; 8001700: 4b1b ldr r3, [pc, #108] @ (8001770 ) 8001702: 68db ldr r3, [r3, #12] 8001704: 4a1a ldr r2, [pc, #104] @ (8001770 ) 8001706: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800170a: 60d3 str r3, [r2, #12] RCC->APB2RSTR &= ~RCC_APB2RSTR_USART1RST; 800170c: 4b18 ldr r3, [pc, #96] @ (8001770 ) 800170e: 68db ldr r3, [r3, #12] 8001710: 4a17 ldr r2, [pc, #92] @ (8001770 ) 8001712: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8001716: 60d3 str r3, [r2, #12] USART1->BRR = mantissa; 8001718: 4a17 ldr r2, [pc, #92] @ (8001778 ) 800171a: 897b ldrh r3, [r7, #10] 800171c: 8113 strh r3, [r2, #8] USART1->CR1 |= 0x200C; //Set up UE, TE and RE 800171e: 4b16 ldr r3, [pc, #88] @ (8001778 ) 8001720: 899b ldrh r3, [r3, #12] 8001722: b29b uxth r3, r3 8001724: 4a14 ldr r2, [pc, #80] @ (8001778 ) 8001726: f443 5300 orr.w r3, r3, #8192 @ 0x2000 800172a: f043 030c orr.w r3, r3, #12 800172e: b29b uxth r3, r3 8001730: 8193 strh r3, [r2, #12] USART1->CR1 |= 1<<8; //PE Interrup Enable 8001732: 4b11 ldr r3, [pc, #68] @ (8001778 ) 8001734: 899b ldrh r3, [r3, #12] 8001736: b29b uxth r3, r3 8001738: 4a0f ldr r2, [pc, #60] @ (8001778 ) 800173a: f443 7380 orr.w r3, r3, #256 @ 0x100 800173e: b29b uxth r3, r3 8001740: 8193 strh r3, [r2, #12] USART1->CR1 |= 1<<5; //RX Not Empty Interrup Enable 8001742: 4b0d ldr r3, [pc, #52] @ (8001778 ) 8001744: 899b ldrh r3, [r3, #12] 8001746: b29b uxth r3, r3 8001748: 4a0b ldr r2, [pc, #44] @ (8001778 ) 800174a: f043 0320 orr.w r3, r3, #32 800174e: b29b uxth r3, r3 8001750: 8193 strh r3, [r2, #12] USART1->SR; //Read Reg SR to Clean TXE and TE,(Reset value: 0x00C0) 8001752: 4b09 ldr r3, [pc, #36] @ (8001778 ) 8001754: 881b ldrh r3, [r3, #0] NVIC_EnableIRQ(USART1_IRQn); 8001756: 2025 movs r0, #37 @ 0x25 8001758: f7ff ff2c bl 80015b4 NVIC_SetPriority(USART1_IRQn, 3); 800175c: 2103 movs r1, #3 800175e: 2025 movs r0, #37 @ 0x25 8001760: f7ff ff40 bl 80015e4 } 8001764: bf00 nop 8001766: 3714 adds r7, #20 8001768: 46bd mov sp, r7 800176a: bd90 pop {r4, r7, pc} 800176c: 000f4240 .word 0x000f4240 8001770: 40021000 .word 0x40021000 8001774: 40010800 .word 0x40010800 8001778: 40013800 .word 0x40013800 0800177c : void USART1_IRQHandler(void) { 800177c: b590 push {r4, r7, lr} 800177e: b085 sub sp, #20 8001780: af02 add r7, sp, #8 if(USART1->SR & USART_SR_RXNE) { 8001782: 4b2e ldr r3, [pc, #184] @ (800183c ) 8001784: 881b ldrh r3, [r3, #0] 8001786: b29b uxth r3, r3 8001788: f003 0320 and.w r3, r3, #32 800178c: 2b00 cmp r3, #0 800178e: d051 beq.n 8001834 const char cmd = USART1->DR; // 读取串口接收寄存器来清除 RXNE 标志 8001790: 4b2a ldr r3, [pc, #168] @ (800183c ) 8001792: 889b ldrh r3, [r3, #4] 8001794: b29b uxth r3, r3 8001796: 71fb strb r3, [r7, #7] switch (cmd) { 8001798: 79fb ldrb r3, [r7, #7] 800179a: 2b24 cmp r3, #36 @ 0x24 800179c: d002 beq.n 80017a4 800179e: 2b3e cmp r3, #62 @ 0x3e 80017a0: d042 beq.n 8001828 case '>': // Jump to bootloader uart_sendStr("Running bootloader..."); jump2ISP(); // NOTE: running bootloader default: //其它按键 break; 80017a2: e046 b.n 8001832 MPU6050_getStructData(&avm_euler); 80017a4: 4826 ldr r0, [pc, #152] @ (8001840 ) 80017a6: f7ff fa5a bl 8000c5e IMU_Comput(avm_euler); 80017aa: 4b25 ldr r3, [pc, #148] @ (8001840 ) 80017ac: 466c mov r4, sp 80017ae: f103 0210 add.w r2, r3, #16 80017b2: e892 0003 ldmia.w r2, {r0, r1} 80017b6: e884 0003 stmia.w r4, {r0, r1} 80017ba: cb0f ldmia r3, {r0, r1, r2, r3} 80017bc: f7ff fb02 bl 8000dc4 pid_SingleAxis(&avm_pid, 0); 80017c0: f04f 0100 mov.w r1, #0 80017c4: 481f ldr r0, [pc, #124] @ (8001844 ) 80017c6: f000 fa4f bl 8001c68 uart_Float2Char(g_Pitch); 80017ca: 4b1f ldr r3, [pc, #124] @ (8001848 ) 80017cc: 681b ldr r3, [r3, #0] 80017ce: 4618 mov r0, r3 80017d0: f000 f900 bl 80019d4 uart_sendStr("@"); 80017d4: 481d ldr r0, [pc, #116] @ (800184c ) 80017d6: f000 fa31 bl 8001c3c uart_Float2Char(g_Roll); 80017da: 4b1d ldr r3, [pc, #116] @ (8001850 ) 80017dc: 681b ldr r3, [r3, #0] 80017de: 4618 mov r0, r3 80017e0: f000 f8f8 bl 80019d4 uart_sendStr("@"); 80017e4: 4819 ldr r0, [pc, #100] @ (800184c ) 80017e6: f000 fa29 bl 8001c3c uart_Float2Char(g_Yaw); 80017ea: 4b1a ldr r3, [pc, #104] @ (8001854 ) 80017ec: 681b ldr r3, [r3, #0] 80017ee: 4618 mov r0, r3 80017f0: f000 f8f0 bl 80019d4 uart_sendStr("@"); 80017f4: 4815 ldr r0, [pc, #84] @ (800184c ) 80017f6: f000 fa21 bl 8001c3c uart_short2char(*avm_pid.Channel1); 80017fa: 4b12 ldr r3, [pc, #72] @ (8001844 ) 80017fc: 6a5b ldr r3, [r3, #36] @ 0x24 80017fe: 881b ldrh r3, [r3, #0] 8001800: b29b uxth r3, r3 8001802: b21b sxth r3, r3 8001804: 4618 mov r0, r3 8001806: f000 f845 bl 8001894 uart_sendStr("@"); 800180a: 4810 ldr r0, [pc, #64] @ (800184c ) 800180c: f000 fa16 bl 8001c3c uart_short2char(*avm_pid.Channel2); 8001810: 4b0c ldr r3, [pc, #48] @ (8001844 ) 8001812: 6a9b ldr r3, [r3, #40] @ 0x28 8001814: 881b ldrh r3, [r3, #0] 8001816: b29b uxth r3, r3 8001818: b21b sxth r3, r3 800181a: 4618 mov r0, r3 800181c: f000 f83a bl 8001894 uart_sendStr("\n\r"); 8001820: 480d ldr r0, [pc, #52] @ (8001858 ) 8001822: f000 fa0b bl 8001c3c break; 8001826: e005 b.n 8001834 uart_sendStr("Running bootloader..."); 8001828: 480c ldr r0, [pc, #48] @ (800185c ) 800182a: f000 fa07 bl 8001c3c jump2ISP(); 800182e: f7fe fe85 bl 800053c break; 8001832: bf00 nop } } } 8001834: bf00 nop 8001836: 370c adds r7, #12 8001838: 46bd mov sp, r7 800183a: bd90 pop {r4, r7, pc} 800183c: 40013800 .word 0x40013800 8001840: 200001f0 .word 0x200001f0 8001844: 2000008c .word 0x2000008c 8001848: 200001e8 .word 0x200001e8 800184c: 080039f0 .word 0x080039f0 8001850: 200001ec .word 0x200001ec 8001854: 200001e4 .word 0x200001e4 8001858: 080039f4 .word 0x080039f4 800185c: 080039f8 .word 0x080039f8 08001860 : void uart_sendData(unsigned char data) { 8001860: b480 push {r7} 8001862: b083 sub sp, #12 8001864: af00 add r7, sp, #0 8001866: 4603 mov r3, r0 8001868: 71fb strb r3, [r7, #7] USART1->DR = data; 800186a: 4b09 ldr r3, [pc, #36] @ (8001890 ) 800186c: 79fa ldrb r2, [r7, #7] 800186e: b292 uxth r2, r2 8001870: 809a strh r2, [r3, #4] while((USART1->SR & 0x40) == 0); 8001872: bf00 nop 8001874: 4b06 ldr r3, [pc, #24] @ (8001890 ) 8001876: 881b ldrh r3, [r3, #0] 8001878: b29b uxth r3, r3 800187a: f003 0340 and.w r3, r3, #64 @ 0x40 800187e: 2b00 cmp r3, #0 8001880: d0f8 beq.n 8001874 } 8001882: bf00 nop 8001884: bf00 nop 8001886: 370c adds r7, #12 8001888: 46bd mov sp, r7 800188a: bc80 pop {r7} 800188c: 4770 bx lr 800188e: bf00 nop 8001890: 40013800 .word 0x40013800 08001894 : void uart_short2char(short k) { 8001894: b580 push {r7, lr} 8001896: b088 sub sp, #32 8001898: af00 add r7, sp, #0 800189a: 4603 mov r3, r0 800189c: 80fb strh r3, [r7, #6] char cache[] = "00000"; 800189e: 4a20 ldr r2, [pc, #128] @ (8001920 ) 80018a0: f107 0314 add.w r3, r7, #20 80018a4: e892 0003 ldmia.w r2, {r0, r1} 80018a8: 6018 str r0, [r3, #0] 80018aa: 3304 adds r3, #4 80018ac: 8019 strh r1, [r3, #0] int i = 4; 80018ae: 2304 movs r3, #4 80018b0: 61fb str r3, [r7, #28] unsigned short bit[] = {10000, 1000, 100, 10, 1}; 80018b2: 4a1c ldr r2, [pc, #112] @ (8001924 ) 80018b4: f107 0308 add.w r3, r7, #8 80018b8: ca07 ldmia r2, {r0, r1, r2} 80018ba: c303 stmia r3!, {r0, r1} 80018bc: 801a strh r2, [r3, #0] do { cache[i] += (char)(k / bit[i] % 10); 80018be: f107 0214 add.w r2, r7, #20 80018c2: 69fb ldr r3, [r7, #28] 80018c4: 4413 add r3, r2 80018c6: 7818 ldrb r0, [r3, #0] 80018c8: f9b7 2006 ldrsh.w r2, [r7, #6] 80018cc: 69fb ldr r3, [r7, #28] 80018ce: 005b lsls r3, r3, #1 80018d0: 3320 adds r3, #32 80018d2: 443b add r3, r7 80018d4: f833 3c18 ldrh.w r3, [r3, #-24] 80018d8: fb92 f2f3 sdiv r2, r2, r3 80018dc: 4b12 ldr r3, [pc, #72] @ (8001928 ) 80018de: fb83 1302 smull r1, r3, r3, r2 80018e2: 1099 asrs r1, r3, #2 80018e4: 17d3 asrs r3, r2, #31 80018e6: 1ac9 subs r1, r1, r3 80018e8: 460b mov r3, r1 80018ea: 009b lsls r3, r3, #2 80018ec: 440b add r3, r1 80018ee: 005b lsls r3, r3, #1 80018f0: 1ad1 subs r1, r2, r3 80018f2: b2cb uxtb r3, r1 80018f4: 4403 add r3, r0 80018f6: b2d9 uxtb r1, r3 80018f8: f107 0214 add.w r2, r7, #20 80018fc: 69fb ldr r3, [r7, #28] 80018fe: 4413 add r3, r2 8001900: 460a mov r2, r1 8001902: 701a strb r2, [r3, #0] } while(i--); 8001904: 69fb ldr r3, [r7, #28] 8001906: 1e5a subs r2, r3, #1 8001908: 61fa str r2, [r7, #28] 800190a: 2b00 cmp r3, #0 800190c: d1d7 bne.n 80018be uart_sendStr(cache); 800190e: f107 0314 add.w r3, r7, #20 8001912: 4618 mov r0, r3 8001914: f000 f992 bl 8001c3c } 8001918: bf00 nop 800191a: 3720 adds r7, #32 800191c: 46bd mov sp, r7 800191e: bd80 pop {r7, pc} 8001920: 08003a10 .word 0x08003a10 8001924: 08003a18 .word 0x08003a18 8001928: 66666667 .word 0x66666667 0800192c : void uart_int2char(unsigned int k) { 800192c: b5b0 push {r4, r5, r7, lr} 800192e: b090 sub sp, #64 @ 0x40 8001930: af00 add r7, sp, #0 8001932: 6078 str r0, [r7, #4] char cache[] = "0000000000"; // Max value is 4294967295 8001934: 4a24 ldr r2, [pc, #144] @ (80019c8 ) 8001936: f107 0334 add.w r3, r7, #52 @ 0x34 800193a: ca07 ldmia r2, {r0, r1, r2} 800193c: c303 stmia r3!, {r0, r1} 800193e: 801a strh r2, [r3, #0] 8001940: 3302 adds r3, #2 8001942: 0c12 lsrs r2, r2, #16 8001944: 701a strb r2, [r3, #0] unsigned char i = 9; 8001946: 2309 movs r3, #9 8001948: f887 303f strb.w r3, [r7, #63] @ 0x3f const unsigned int bit[] = {1000000000, 100000000, 10000000, 1000000, 100000, 10000, 1000, 100, 10, 1}; 800194c: 4b1f ldr r3, [pc, #124] @ (80019cc ) 800194e: f107 040c add.w r4, r7, #12 8001952: 461d mov r5, r3 8001954: cd0f ldmia r5!, {r0, r1, r2, r3} 8001956: c40f stmia r4!, {r0, r1, r2, r3} 8001958: cd0f ldmia r5!, {r0, r1, r2, r3} 800195a: c40f stmia r4!, {r0, r1, r2, r3} 800195c: e895 0003 ldmia.w r5, {r0, r1} 8001960: e884 0003 stmia.w r4, {r0, r1} do { cache[i] += (char)(k / bit[i] % 10); 8001964: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 8001968: 3340 adds r3, #64 @ 0x40 800196a: 443b add r3, r7 800196c: f813 0c0c ldrb.w r0, [r3, #-12] 8001970: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 8001974: 009b lsls r3, r3, #2 8001976: 3340 adds r3, #64 @ 0x40 8001978: 443b add r3, r7 800197a: f853 3c34 ldr.w r3, [r3, #-52] 800197e: 687a ldr r2, [r7, #4] 8001980: fbb2 f1f3 udiv r1, r2, r3 8001984: 4b12 ldr r3, [pc, #72] @ (80019d0 ) 8001986: fba3 2301 umull r2, r3, r3, r1 800198a: 08da lsrs r2, r3, #3 800198c: 4613 mov r3, r2 800198e: 009b lsls r3, r3, #2 8001990: 4413 add r3, r2 8001992: 005b lsls r3, r3, #1 8001994: 1aca subs r2, r1, r3 8001996: b2d2 uxtb r2, r2 8001998: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 800199c: 4402 add r2, r0 800199e: b2d2 uxtb r2, r2 80019a0: 3340 adds r3, #64 @ 0x40 80019a2: 443b add r3, r7 80019a4: f803 2c0c strb.w r2, [r3, #-12] } while(i--); 80019a8: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 80019ac: 1e5a subs r2, r3, #1 80019ae: f887 203f strb.w r2, [r7, #63] @ 0x3f 80019b2: 2b00 cmp r3, #0 80019b4: d1d6 bne.n 8001964 uart_sendStr(cache); 80019b6: f107 0334 add.w r3, r7, #52 @ 0x34 80019ba: 4618 mov r0, r3 80019bc: f000 f93e bl 8001c3c } 80019c0: bf00 nop 80019c2: 3740 adds r7, #64 @ 0x40 80019c4: 46bd mov sp, r7 80019c6: bdb0 pop {r4, r5, r7, pc} 80019c8: 08003a24 .word 0x08003a24 80019cc: 08003a30 .word 0x08003a30 80019d0: cccccccd .word 0xcccccccd 080019d4 : unsigned char uart_Float2Char(float value) { 80019d4: b580 push {r7, lr} 80019d6: b088 sub sp, #32 80019d8: af00 add r7, sp, #0 80019da: 6078 str r0, [r7, #4] unsigned char IntegerPart; float DecimalPart; unsigned char i = 0; 80019dc: 2300 movs r3, #0 80019de: 75fb strb r3, [r7, #23] char temp; char array[8] = {0,0,0,0,0,0,0}; 80019e0: f107 030c add.w r3, r7, #12 80019e4: 2200 movs r2, #0 80019e6: 601a str r2, [r3, #0] 80019e8: 605a str r2, [r3, #4] if(value < 0 ) { 80019ea: f04f 0100 mov.w r1, #0 80019ee: 6878 ldr r0, [r7, #4] 80019f0: f001 ff82 bl 80038f8 <__aeabi_fcmplt> 80019f4: 4603 mov r3, r0 80019f6: 2b00 cmp r3, #0 80019f8: d006 beq.n 8001a08 value = value * -1; 80019fa: 687b ldr r3, [r7, #4] 80019fc: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 8001a00: 607b str r3, [r7, #4] uart_sendData('-'); 8001a02: 202d movs r0, #45 @ 0x2d 8001a04: f7ff ff2c bl 8001860 } if(value >= 1) { 8001a08: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 8001a0c: 6878 ldr r0, [r7, #4] 8001a0e: f001 ff87 bl 8003920 <__aeabi_fcmpge> 8001a12: 4603 mov r3, r0 8001a14: 2b00 cmp r3, #0 8001a16: d010 beq.n 8001a3a IntegerPart = (unsigned char)value; 8001a18: 6878 ldr r0, [r7, #4] 8001a1a: f001 ffbb bl 8003994 <__aeabi_f2uiz> 8001a1e: 4603 mov r3, r0 8001a20: 77fb strb r3, [r7, #31] DecimalPart = value - IntegerPart; 8001a22: 7ffb ldrb r3, [r7, #31] 8001a24: 4618 mov r0, r3 8001a26: f001 fd75 bl 8003514 <__aeabi_i2f> 8001a2a: 4603 mov r3, r0 8001a2c: 4619 mov r1, r3 8001a2e: 6878 ldr r0, [r7, #4] 8001a30: f001 fcba bl 80033a8 <__aeabi_fsub> 8001a34: 4603 mov r3, r0 8001a36: 61bb str r3, [r7, #24] 8001a38: e00c b.n 8001a54 } else { IntegerPart = 0; 8001a3a: 2300 movs r3, #0 8001a3c: 77fb strb r3, [r7, #31] DecimalPart = value - IntegerPart; 8001a3e: 7ffb ldrb r3, [r7, #31] 8001a40: 4618 mov r0, r3 8001a42: f001 fd67 bl 8003514 <__aeabi_i2f> 8001a46: 4603 mov r3, r0 8001a48: 4619 mov r1, r3 8001a4a: 6878 ldr r0, [r7, #4] 8001a4c: f001 fcac bl 80033a8 <__aeabi_fsub> 8001a50: 4603 mov r3, r0 8001a52: 61bb str r3, [r7, #24] } if(IntegerPart == 0) { 8001a54: 7ffb ldrb r3, [r7, #31] 8001a56: 2b00 cmp r3, #0 8001a58: d121 bne.n 8001a9e array[0] = '0'; 8001a5a: 2330 movs r3, #48 @ 0x30 8001a5c: 733b strb r3, [r7, #12] array[1] = '.'; 8001a5e: 232e movs r3, #46 @ 0x2e 8001a60: 737b strb r3, [r7, #13] i = 1; 8001a62: 2301 movs r3, #1 8001a64: 75fb strb r3, [r7, #23] 8001a66: e04d b.n 8001b04 } else { while(IntegerPart > 0) { array[i] = IntegerPart%10 + '0'; 8001a68: 7ffa ldrb r2, [r7, #31] 8001a6a: 4b6f ldr r3, [pc, #444] @ (8001c28 ) 8001a6c: fba3 1302 umull r1, r3, r3, r2 8001a70: 08d9 lsrs r1, r3, #3 8001a72: 460b mov r3, r1 8001a74: 009b lsls r3, r3, #2 8001a76: 440b add r3, r1 8001a78: 005b lsls r3, r3, #1 8001a7a: 1ad3 subs r3, r2, r3 8001a7c: b2da uxtb r2, r3 8001a7e: 7dfb ldrb r3, [r7, #23] 8001a80: 3230 adds r2, #48 @ 0x30 8001a82: b2d2 uxtb r2, r2 8001a84: 3320 adds r3, #32 8001a86: 443b add r3, r7 8001a88: f803 2c14 strb.w r2, [r3, #-20] IntegerPart/=10; 8001a8c: 7ffb ldrb r3, [r7, #31] 8001a8e: 4a66 ldr r2, [pc, #408] @ (8001c28 ) 8001a90: fba2 2303 umull r2, r3, r2, r3 8001a94: 08db lsrs r3, r3, #3 8001a96: 77fb strb r3, [r7, #31] i++; 8001a98: 7dfb ldrb r3, [r7, #23] 8001a9a: 3301 adds r3, #1 8001a9c: 75fb strb r3, [r7, #23] while(IntegerPart > 0) { 8001a9e: 7ffb ldrb r3, [r7, #31] 8001aa0: 2b00 cmp r3, #0 8001aa2: d1e1 bne.n 8001a68 } i--; 8001aa4: 7dfb ldrb r3, [r7, #23] 8001aa6: 3b01 subs r3, #1 8001aa8: 75fb strb r3, [r7, #23] for(unsigned char j = 0; j < i; j++) { 8001aaa: 2300 movs r3, #0 8001aac: 75bb strb r3, [r7, #22] 8001aae: e01c b.n 8001aea temp = array[j]; 8001ab0: 7dbb ldrb r3, [r7, #22] 8001ab2: 3320 adds r3, #32 8001ab4: 443b add r3, r7 8001ab6: f813 3c14 ldrb.w r3, [r3, #-20] 8001aba: 753b strb r3, [r7, #20] array[j] = array[i-j]; 8001abc: 7dfa ldrb r2, [r7, #23] 8001abe: 7dbb ldrb r3, [r7, #22] 8001ac0: 1ad2 subs r2, r2, r3 8001ac2: 7dbb ldrb r3, [r7, #22] 8001ac4: 3220 adds r2, #32 8001ac6: 443a add r2, r7 8001ac8: f812 2c14 ldrb.w r2, [r2, #-20] 8001acc: 3320 adds r3, #32 8001ace: 443b add r3, r7 8001ad0: f803 2c14 strb.w r2, [r3, #-20] array[i-j] = temp; 8001ad4: 7dfa ldrb r2, [r7, #23] 8001ad6: 7dbb ldrb r3, [r7, #22] 8001ad8: 1ad3 subs r3, r2, r3 8001ada: 3320 adds r3, #32 8001adc: 443b add r3, r7 8001ade: 7d3a ldrb r2, [r7, #20] 8001ae0: f803 2c14 strb.w r2, [r3, #-20] for(unsigned char j = 0; j < i; j++) { 8001ae4: 7dbb ldrb r3, [r7, #22] 8001ae6: 3301 adds r3, #1 8001ae8: 75bb strb r3, [r7, #22] 8001aea: 7dba ldrb r2, [r7, #22] 8001aec: 7dfb ldrb r3, [r7, #23] 8001aee: 429a cmp r2, r3 8001af0: d3de bcc.n 8001ab0 } i++; 8001af2: 7dfb ldrb r3, [r7, #23] 8001af4: 3301 adds r3, #1 8001af6: 75fb strb r3, [r7, #23] array[i] = '.'; 8001af8: 7dfb ldrb r3, [r7, #23] 8001afa: 3320 adds r3, #32 8001afc: 443b add r3, r7 8001afe: 222e movs r2, #46 @ 0x2e 8001b00: f803 2c14 strb.w r2, [r3, #-20] } i++; 8001b04: 7dfb ldrb r3, [r7, #23] 8001b06: 3301 adds r3, #1 8001b08: 75fb strb r3, [r7, #23] array[i++] = (unsigned int)(DecimalPart * 10)%10 + '0'; 8001b0a: 4948 ldr r1, [pc, #288] @ (8001c2c ) 8001b0c: 69b8 ldr r0, [r7, #24] 8001b0e: f001 fd55 bl 80035bc <__aeabi_fmul> 8001b12: 4603 mov r3, r0 8001b14: 4618 mov r0, r3 8001b16: f001 ff3d bl 8003994 <__aeabi_f2uiz> 8001b1a: 4601 mov r1, r0 8001b1c: 4b42 ldr r3, [pc, #264] @ (8001c28 ) 8001b1e: fba3 2301 umull r2, r3, r3, r1 8001b22: 08da lsrs r2, r3, #3 8001b24: 4613 mov r3, r2 8001b26: 009b lsls r3, r3, #2 8001b28: 4413 add r3, r2 8001b2a: 005b lsls r3, r3, #1 8001b2c: 1aca subs r2, r1, r3 8001b2e: b2d2 uxtb r2, r2 8001b30: 7dfb ldrb r3, [r7, #23] 8001b32: 1c59 adds r1, r3, #1 8001b34: 75f9 strb r1, [r7, #23] 8001b36: 3230 adds r2, #48 @ 0x30 8001b38: b2d2 uxtb r2, r2 8001b3a: 3320 adds r3, #32 8001b3c: 443b add r3, r7 8001b3e: f803 2c14 strb.w r2, [r3, #-20] array[i++] = (unsigned int)(DecimalPart * 100)%10 + '0'; 8001b42: 493b ldr r1, [pc, #236] @ (8001c30 ) 8001b44: 69b8 ldr r0, [r7, #24] 8001b46: f001 fd39 bl 80035bc <__aeabi_fmul> 8001b4a: 4603 mov r3, r0 8001b4c: 4618 mov r0, r3 8001b4e: f001 ff21 bl 8003994 <__aeabi_f2uiz> 8001b52: 4601 mov r1, r0 8001b54: 4b34 ldr r3, [pc, #208] @ (8001c28 ) 8001b56: fba3 2301 umull r2, r3, r3, r1 8001b5a: 08da lsrs r2, r3, #3 8001b5c: 4613 mov r3, r2 8001b5e: 009b lsls r3, r3, #2 8001b60: 4413 add r3, r2 8001b62: 005b lsls r3, r3, #1 8001b64: 1aca subs r2, r1, r3 8001b66: b2d2 uxtb r2, r2 8001b68: 7dfb ldrb r3, [r7, #23] 8001b6a: 1c59 adds r1, r3, #1 8001b6c: 75f9 strb r1, [r7, #23] 8001b6e: 3230 adds r2, #48 @ 0x30 8001b70: b2d2 uxtb r2, r2 8001b72: 3320 adds r3, #32 8001b74: 443b add r3, r7 8001b76: f803 2c14 strb.w r2, [r3, #-20] array[i++] = (unsigned int)(DecimalPart * 1000)%10 + '0'; 8001b7a: 492e ldr r1, [pc, #184] @ (8001c34 ) 8001b7c: 69b8 ldr r0, [r7, #24] 8001b7e: f001 fd1d bl 80035bc <__aeabi_fmul> 8001b82: 4603 mov r3, r0 8001b84: 4618 mov r0, r3 8001b86: f001 ff05 bl 8003994 <__aeabi_f2uiz> 8001b8a: 4601 mov r1, r0 8001b8c: 4b26 ldr r3, [pc, #152] @ (8001c28 ) 8001b8e: fba3 2301 umull r2, r3, r3, r1 8001b92: 08da lsrs r2, r3, #3 8001b94: 4613 mov r3, r2 8001b96: 009b lsls r3, r3, #2 8001b98: 4413 add r3, r2 8001b9a: 005b lsls r3, r3, #1 8001b9c: 1aca subs r2, r1, r3 8001b9e: b2d2 uxtb r2, r2 8001ba0: 7dfb ldrb r3, [r7, #23] 8001ba2: 1c59 adds r1, r3, #1 8001ba4: 75f9 strb r1, [r7, #23] 8001ba6: 3230 adds r2, #48 @ 0x30 8001ba8: b2d2 uxtb r2, r2 8001baa: 3320 adds r3, #32 8001bac: 443b add r3, r7 8001bae: f803 2c14 strb.w r2, [r3, #-20] array[i++] = (unsigned int)(DecimalPart * 10000)%10 + '0'; 8001bb2: 4921 ldr r1, [pc, #132] @ (8001c38 ) 8001bb4: 69b8 ldr r0, [r7, #24] 8001bb6: f001 fd01 bl 80035bc <__aeabi_fmul> 8001bba: 4603 mov r3, r0 8001bbc: 4618 mov r0, r3 8001bbe: f001 fee9 bl 8003994 <__aeabi_f2uiz> 8001bc2: 4601 mov r1, r0 8001bc4: 4b18 ldr r3, [pc, #96] @ (8001c28 ) 8001bc6: fba3 2301 umull r2, r3, r3, r1 8001bca: 08da lsrs r2, r3, #3 8001bcc: 4613 mov r3, r2 8001bce: 009b lsls r3, r3, #2 8001bd0: 4413 add r3, r2 8001bd2: 005b lsls r3, r3, #1 8001bd4: 1aca subs r2, r1, r3 8001bd6: b2d2 uxtb r2, r2 8001bd8: 7dfb ldrb r3, [r7, #23] 8001bda: 1c59 adds r1, r3, #1 8001bdc: 75f9 strb r1, [r7, #23] 8001bde: 3230 adds r2, #48 @ 0x30 8001be0: b2d2 uxtb r2, r2 8001be2: 3320 adds r3, #32 8001be4: 443b add r3, r7 8001be6: f803 2c14 strb.w r2, [r3, #-20] array[i++] = '\0'; 8001bea: 7dfb ldrb r3, [r7, #23] 8001bec: 1c5a adds r2, r3, #1 8001bee: 75fa strb r2, [r7, #23] 8001bf0: 3320 adds r3, #32 8001bf2: 443b add r3, r7 8001bf4: 2200 movs r2, #0 8001bf6: f803 2c14 strb.w r2, [r3, #-20] for(unsigned char j = 0; j < i; j ++) { 8001bfa: 2300 movs r3, #0 8001bfc: 757b strb r3, [r7, #21] 8001bfe: e00a b.n 8001c16 uart_sendData(array[j]); 8001c00: 7d7b ldrb r3, [r7, #21] 8001c02: 3320 adds r3, #32 8001c04: 443b add r3, r7 8001c06: f813 3c14 ldrb.w r3, [r3, #-20] 8001c0a: 4618 mov r0, r3 8001c0c: f7ff fe28 bl 8001860 for(unsigned char j = 0; j < i; j ++) { 8001c10: 7d7b ldrb r3, [r7, #21] 8001c12: 3301 adds r3, #1 8001c14: 757b strb r3, [r7, #21] 8001c16: 7d7a ldrb r2, [r7, #21] 8001c18: 7dfb ldrb r3, [r7, #23] 8001c1a: 429a cmp r2, r3 8001c1c: d3f0 bcc.n 8001c00 } return i; 8001c1e: 7dfb ldrb r3, [r7, #23] } 8001c20: 4618 mov r0, r3 8001c22: 3720 adds r7, #32 8001c24: 46bd mov sp, r7 8001c26: bd80 pop {r7, pc} 8001c28: cccccccd .word 0xcccccccd 8001c2c: 41200000 .word 0x41200000 8001c30: 42c80000 .word 0x42c80000 8001c34: 447a0000 .word 0x447a0000 8001c38: 461c4000 .word 0x461c4000 08001c3c : void uart_sendStr(char *cmd) { 8001c3c: b580 push {r7, lr} 8001c3e: b082 sub sp, #8 8001c40: af00 add r7, sp, #0 8001c42: 6078 str r0, [r7, #4] while(*cmd) 8001c44: e006 b.n 8001c54 uart_sendData(*cmd++); 8001c46: 687b ldr r3, [r7, #4] 8001c48: 1c5a adds r2, r3, #1 8001c4a: 607a str r2, [r7, #4] 8001c4c: 781b ldrb r3, [r3, #0] 8001c4e: 4618 mov r0, r3 8001c50: f7ff fe06 bl 8001860 while(*cmd) 8001c54: 687b ldr r3, [r7, #4] 8001c56: 781b ldrb r3, [r3, #0] 8001c58: 2b00 cmp r3, #0 8001c5a: d1f4 bne.n 8001c46 } 8001c5c: bf00 nop 8001c5e: bf00 nop 8001c60: 3708 adds r7, #8 8001c62: 46bd mov sp, r7 8001c64: bd80 pop {r7, pc} 8001c66: bf00 nop 08001c68 : .Channel1 = &MOTOR2, .Channel2 = &MOTOR4, .Gyro = &avm_euler.gX, }; void pid_SingleAxis(pid_pst temp, float setPoint) { 8001c68: b590 push {r4, r7, lr} 8001c6a: b083 sub sp, #12 8001c6c: af00 add r7, sp, #0 8001c6e: 6078 str r0, [r7, #4] 8001c70: 6039 str r1, [r7, #0] temp->Error = *temp->Feedback - setPoint; 8001c72: 687b ldr r3, [r7, #4] 8001c74: 689b ldr r3, [r3, #8] 8001c76: 681b ldr r3, [r3, #0] 8001c78: 6839 ldr r1, [r7, #0] 8001c7a: 4618 mov r0, r3 8001c7c: f001 fb94 bl 80033a8 <__aeabi_fsub> 8001c80: 4603 mov r3, r0 8001c82: 461a mov r2, r3 8001c84: 687b ldr r3, [r7, #4] 8001c86: 611a str r2, [r3, #16] //Outter Loop PID temp->i += temp->Error; 8001c88: 687b ldr r3, [r7, #4] 8001c8a: 699a ldr r2, [r3, #24] 8001c8c: 687b ldr r3, [r7, #4] 8001c8e: 691b ldr r3, [r3, #16] 8001c90: 4619 mov r1, r3 8001c92: 4610 mov r0, r2 8001c94: f001 fb8a bl 80033ac <__addsf3> 8001c98: 4603 mov r3, r0 8001c9a: 461a mov r2, r3 8001c9c: 687b ldr r3, [r7, #4] 8001c9e: 619a str r2, [r3, #24] if (temp->i > PID_IMAX) 8001ca0: 687b ldr r3, [r7, #4] 8001ca2: 699b ldr r3, [r3, #24] 8001ca4: 4976 ldr r1, [pc, #472] @ (8001e80 ) 8001ca6: 4618 mov r0, r3 8001ca8: f001 fe44 bl 8003934 <__aeabi_fcmpgt> 8001cac: 4603 mov r3, r0 8001cae: 2b00 cmp r3, #0 8001cb0: d003 beq.n 8001cba temp->i = PID_IMAX; 8001cb2: 687b ldr r3, [r7, #4] 8001cb4: 4a72 ldr r2, [pc, #456] @ (8001e80 ) 8001cb6: 619a str r2, [r3, #24] 8001cb8: e00b b.n 8001cd2 else if (temp->i < PID_IMIN) 8001cba: 687b ldr r3, [r7, #4] 8001cbc: 699b ldr r3, [r3, #24] 8001cbe: 4971 ldr r1, [pc, #452] @ (8001e84 ) 8001cc0: 4618 mov r0, r3 8001cc2: f001 fe19 bl 80038f8 <__aeabi_fcmplt> 8001cc6: 4603 mov r3, r0 8001cc8: 2b00 cmp r3, #0 8001cca: d002 beq.n 8001cd2 temp->i = PID_IMIN; 8001ccc: 687b ldr r3, [r7, #4] 8001cce: 4a6d ldr r2, [pc, #436] @ (8001e84 ) 8001cd0: 619a str r2, [r3, #24] temp->d = *temp->Feedback - temp->OutterLast; 8001cd2: 687b ldr r3, [r7, #4] 8001cd4: 689b ldr r3, [r3, #8] 8001cd6: 681a ldr r2, [r3, #0] 8001cd8: 687b ldr r3, [r7, #4] 8001cda: 685b ldr r3, [r3, #4] 8001cdc: 4619 mov r1, r3 8001cde: 4610 mov r0, r2 8001ce0: f001 fb62 bl 80033a8 <__aeabi_fsub> 8001ce4: 4603 mov r3, r0 8001ce6: 461a mov r2, r3 8001ce8: 687b ldr r3, [r7, #4] 8001cea: 61da str r2, [r3, #28] temp->output = (short)(OUTTER_LOOP_KP * (temp->Error) + OUTTER_LOOP_KI * temp->i + OUTTER_LOOP_KD * temp->d); 8001cec: 687b ldr r3, [r7, #4] 8001cee: 691b ldr r3, [r3, #16] 8001cf0: 4965 ldr r1, [pc, #404] @ (8001e88 ) 8001cf2: 4618 mov r0, r3 8001cf4: f001 fc62 bl 80035bc <__aeabi_fmul> 8001cf8: 4603 mov r3, r0 8001cfa: 461a mov r2, r3 8001cfc: 687b ldr r3, [r7, #4] 8001cfe: 699b ldr r3, [r3, #24] 8001d00: 4619 mov r1, r3 8001d02: 4610 mov r0, r2 8001d04: f001 fb52 bl 80033ac <__addsf3> 8001d08: 4603 mov r3, r0 8001d0a: 461c mov r4, r3 8001d0c: 687b ldr r3, [r7, #4] 8001d0e: 69db ldr r3, [r3, #28] 8001d10: 495e ldr r1, [pc, #376] @ (8001e8c ) 8001d12: 4618 mov r0, r3 8001d14: f001 fc52 bl 80035bc <__aeabi_fmul> 8001d18: 4603 mov r3, r0 8001d1a: 4619 mov r1, r3 8001d1c: 4620 mov r0, r4 8001d1e: f001 fb45 bl 80033ac <__addsf3> 8001d22: 4603 mov r3, r0 8001d24: 4618 mov r0, r3 8001d26: f001 fe0f bl 8003948 <__aeabi_f2iz> 8001d2a: 4603 mov r3, r0 8001d2c: b21a sxth r2, r3 8001d2e: 687b ldr r3, [r7, #4] 8001d30: 841a strh r2, [r3, #32] temp->OutterLast = *temp->Feedback; //Save Old Data 8001d32: 687b ldr r3, [r7, #4] 8001d34: 689b ldr r3, [r3, #8] 8001d36: 681a ldr r2, [r3, #0] 8001d38: 687b ldr r3, [r7, #4] 8001d3a: 605a str r2, [r3, #4] //Inner Loop PD temp->p = temp->output + *temp->Gyro; 8001d3c: 687b ldr r3, [r7, #4] 8001d3e: f9b3 3020 ldrsh.w r3, [r3, #32] 8001d42: 4618 mov r0, r3 8001d44: f001 fbe6 bl 8003514 <__aeabi_i2f> 8001d48: 4602 mov r2, r0 8001d4a: 687b ldr r3, [r7, #4] 8001d4c: 68db ldr r3, [r3, #12] 8001d4e: 681b ldr r3, [r3, #0] 8001d50: 4619 mov r1, r3 8001d52: 4610 mov r0, r2 8001d54: f001 fb2a bl 80033ac <__addsf3> 8001d58: 4603 mov r3, r0 8001d5a: 461a mov r2, r3 8001d5c: 687b ldr r3, [r7, #4] 8001d5e: 615a str r2, [r3, #20] temp->d = *temp->Gyro - temp->InnerLast; 8001d60: 687b ldr r3, [r7, #4] 8001d62: 68db ldr r3, [r3, #12] 8001d64: 681a ldr r2, [r3, #0] 8001d66: 687b ldr r3, [r7, #4] 8001d68: 681b ldr r3, [r3, #0] 8001d6a: 4619 mov r1, r3 8001d6c: 4610 mov r0, r2 8001d6e: f001 fb1b bl 80033a8 <__aeabi_fsub> 8001d72: 4603 mov r3, r0 8001d74: 461a mov r2, r3 8001d76: 687b ldr r3, [r7, #4] 8001d78: 61da str r2, [r3, #28] temp->output = (short)(INNER_LOOP_KP * temp->p + INNER_LOOP_KD * temp->d); 8001d7a: 687b ldr r3, [r7, #4] 8001d7c: 695c ldr r4, [r3, #20] 8001d7e: 687b ldr r3, [r7, #4] 8001d80: 69db ldr r3, [r3, #28] 8001d82: 4942 ldr r1, [pc, #264] @ (8001e8c ) 8001d84: 4618 mov r0, r3 8001d86: f001 fc19 bl 80035bc <__aeabi_fmul> 8001d8a: 4603 mov r3, r0 8001d8c: 4619 mov r1, r3 8001d8e: 4620 mov r0, r4 8001d90: f001 fb0c bl 80033ac <__addsf3> 8001d94: 4603 mov r3, r0 8001d96: 4618 mov r0, r3 8001d98: f001 fdd6 bl 8003948 <__aeabi_f2iz> 8001d9c: 4603 mov r3, r0 8001d9e: b21a sxth r2, r3 8001da0: 687b ldr r3, [r7, #4] 8001da2: 841a strh r2, [r3, #32] if (*temp->Channel1+temp->output > THROTTLE_MAX) 8001da4: 687b ldr r3, [r7, #4] 8001da6: 6a5b ldr r3, [r3, #36] @ 0x24 8001da8: 881b ldrh r3, [r3, #0] 8001daa: b29b uxth r3, r3 8001dac: 461a mov r2, r3 8001dae: 687b ldr r3, [r7, #4] 8001db0: f9b3 3020 ldrsh.w r3, [r3, #32] 8001db4: 4413 add r3, r2 8001db6: f5b3 6f61 cmp.w r3, #3600 @ 0xe10 8001dba: dd05 ble.n 8001dc8 *temp->Channel1 = THROTTLE_MAX; 8001dbc: 687b ldr r3, [r7, #4] 8001dbe: 6a5b ldr r3, [r3, #36] @ 0x24 8001dc0: f44f 6261 mov.w r2, #3600 @ 0xe10 8001dc4: 801a strh r2, [r3, #0] 8001dc6: e01f b.n 8001e08 else if (*temp->Channel1+temp->output < THROTTLE_MIN) 8001dc8: 687b ldr r3, [r7, #4] 8001dca: 6a5b ldr r3, [r3, #36] @ 0x24 8001dcc: 881b ldrh r3, [r3, #0] 8001dce: b29b uxth r3, r3 8001dd0: 461a mov r2, r3 8001dd2: 687b ldr r3, [r7, #4] 8001dd4: f9b3 3020 ldrsh.w r3, [r3, #32] 8001dd8: 4413 add r3, r2 8001dda: f240 6253 movw r2, #1619 @ 0x653 8001dde: 4293 cmp r3, r2 8001de0: dc05 bgt.n 8001dee *temp->Channel1 = THROTTLE_MIN; 8001de2: 687b ldr r3, [r7, #4] 8001de4: 6a5b ldr r3, [r3, #36] @ 0x24 8001de6: f240 6254 movw r2, #1620 @ 0x654 8001dea: 801a strh r2, [r3, #0] 8001dec: e00c b.n 8001e08 else *temp->Channel1 += (short)temp->output; 8001dee: 687b ldr r3, [r7, #4] 8001df0: 6a5b ldr r3, [r3, #36] @ 0x24 8001df2: 881b ldrh r3, [r3, #0] 8001df4: b299 uxth r1, r3 8001df6: 687b ldr r3, [r7, #4] 8001df8: f9b3 3020 ldrsh.w r3, [r3, #32] 8001dfc: b29a uxth r2, r3 8001dfe: 687b ldr r3, [r7, #4] 8001e00: 6a5b ldr r3, [r3, #36] @ 0x24 8001e02: 440a add r2, r1 8001e04: b292 uxth r2, r2 8001e06: 801a strh r2, [r3, #0] if (*temp->Channel2-temp->output > THROTTLE_MAX) 8001e08: 687b ldr r3, [r7, #4] 8001e0a: 6a9b ldr r3, [r3, #40] @ 0x28 8001e0c: 881b ldrh r3, [r3, #0] 8001e0e: b29b uxth r3, r3 8001e10: 461a mov r2, r3 8001e12: 687b ldr r3, [r7, #4] 8001e14: f9b3 3020 ldrsh.w r3, [r3, #32] 8001e18: 1ad3 subs r3, r2, r3 8001e1a: f5b3 6f61 cmp.w r3, #3600 @ 0xe10 8001e1e: dd05 ble.n 8001e2c *temp->Channel2 = THROTTLE_MAX; 8001e20: 687b ldr r3, [r7, #4] 8001e22: 6a9b ldr r3, [r3, #40] @ 0x28 8001e24: f44f 6261 mov.w r2, #3600 @ 0xe10 8001e28: 801a strh r2, [r3, #0] 8001e2a: e01f b.n 8001e6c else if (*temp->Channel2-temp->output < THROTTLE_MIN) *temp->Channel2 = THROTTLE_MIN; 8001e2c: 687b ldr r3, [r7, #4] 8001e2e: 6a9b ldr r3, [r3, #40] @ 0x28 8001e30: 881b ldrh r3, [r3, #0] 8001e32: b29b uxth r3, r3 8001e34: 461a mov r2, r3 8001e36: 687b ldr r3, [r7, #4] 8001e38: f9b3 3020 ldrsh.w r3, [r3, #32] 8001e3c: 1ad3 subs r3, r2, r3 8001e3e: f240 6253 movw r2, #1619 @ 0x653 8001e42: 4293 cmp r3, r2 8001e44: dc05 bgt.n 8001e52 8001e46: 687b ldr r3, [r7, #4] 8001e48: 6a9b ldr r3, [r3, #40] @ 0x28 8001e4a: f240 6254 movw r2, #1620 @ 0x654 8001e4e: 801a strh r2, [r3, #0] 8001e50: e00c b.n 8001e6c else *temp->Channel2 -= (short)temp->output; 8001e52: 687b ldr r3, [r7, #4] 8001e54: 6a9b ldr r3, [r3, #40] @ 0x28 8001e56: 881b ldrh r3, [r3, #0] 8001e58: b299 uxth r1, r3 8001e5a: 687b ldr r3, [r7, #4] 8001e5c: f9b3 3020 ldrsh.w r3, [r3, #32] 8001e60: b29a uxth r2, r3 8001e62: 687b ldr r3, [r7, #4] 8001e64: 6a9b ldr r3, [r3, #40] @ 0x28 8001e66: 1a8a subs r2, r1, r2 8001e68: b292 uxth r2, r2 8001e6a: 801a strh r2, [r3, #0] temp->InnerLast = *temp->Gyro; 8001e6c: 687b ldr r3, [r7, #4] 8001e6e: 68db ldr r3, [r3, #12] 8001e70: 681a ldr r2, [r3, #0] 8001e72: 687b ldr r3, [r7, #4] 8001e74: 601a str r2, [r3, #0] } 8001e76: bf00 nop 8001e78: 370c adds r7, #12 8001e7a: 46bd mov sp, r7 8001e7c: bd90 pop {r4, r7, pc} 8001e7e: bf00 nop 8001e80: 41f00000 .word 0x41f00000 8001e84: c1f00000 .word 0xc1f00000 8001e88: 40400000 .word 0x40400000 8001e8c: 3e99999a .word 0x3e99999a 08001e90 : 8001e90: f000 b912 b.w 80020b8 <__ieee754_atan2> 08001e94 : 8001e94: b5f8 push {r3, r4, r5, r6, r7, lr} 8001e96: 4604 mov r4, r0 8001e98: 460d mov r5, r1 8001e9a: f000 f823 bl 8001ee4 <__ieee754_sqrt> 8001e9e: 4622 mov r2, r4 8001ea0: 4606 mov r6, r0 8001ea2: 460f mov r7, r1 8001ea4: 462b mov r3, r5 8001ea6: 4620 mov r0, r4 8001ea8: 4629 mov r1, r5 8001eaa: f001 fa13 bl 80032d4 <__aeabi_dcmpun> 8001eae: b930 cbnz r0, 8001ebe 8001eb0: 4620 mov r0, r4 8001eb2: 4629 mov r1, r5 8001eb4: 2200 movs r2, #0 8001eb6: 2300 movs r3, #0 8001eb8: f001 f9e4 bl 8003284 <__aeabi_dcmplt> 8001ebc: b910 cbnz r0, 8001ec4 8001ebe: 4630 mov r0, r6 8001ec0: 4639 mov r1, r7 8001ec2: bdf8 pop {r3, r4, r5, r6, r7, pc} 8001ec4: f001 fd86 bl 80039d4 <__errno> 8001ec8: 2200 movs r2, #0 8001eca: 2300 movs r3, #0 8001ecc: 2121 movs r1, #33 @ 0x21 8001ece: 6001 str r1, [r0, #0] 8001ed0: 4610 mov r0, r2 8001ed2: 4619 mov r1, r3 8001ed4: f001 f88e bl 8002ff4 <__aeabi_ddiv> 8001ed8: 4606 mov r6, r0 8001eda: 460f mov r7, r1 8001edc: 4630 mov r0, r6 8001ede: 4639 mov r1, r7 8001ee0: bdf8 pop {r3, r4, r5, r6, r7, pc} 8001ee2: bf00 nop 08001ee4 <__ieee754_sqrt>: 8001ee4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8001ee8: 4d71 ldr r5, [pc, #452] @ (80020b0 <__ieee754_sqrt+0x1cc>) 8001eea: 4606 mov r6, r0 8001eec: 438d bics r5, r1 8001eee: 460f mov r7, r1 8001ef0: f000 80a2 beq.w 8002038 <__ieee754_sqrt+0x154> 8001ef4: 2900 cmp r1, #0 8001ef6: 460c mov r4, r1 8001ef8: 4602 mov r2, r0 8001efa: 4603 mov r3, r0 8001efc: dd56 ble.n 8001fac <__ieee754_sqrt+0xc8> 8001efe: 1508 asrs r0, r1, #20 8001f00: f000 80c5 beq.w 800208e <__ieee754_sqrt+0x1aa> 8001f04: f3c4 0213 ubfx r2, r4, #0, #20 8001f08: 07c1 lsls r1, r0, #31 8001f0a: f2a0 37ff subw r7, r0, #1023 @ 0x3ff 8001f0e: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 8001f12: d403 bmi.n 8001f1c <__ieee754_sqrt+0x38> 8001f14: 0fd9 lsrs r1, r3, #31 8001f16: eb01 0242 add.w r2, r1, r2, lsl #1 8001f1a: 005b lsls r3, r3, #1 8001f1c: 2600 movs r6, #0 8001f1e: 2416 movs r4, #22 8001f20: f44f 1100 mov.w r1, #2097152 @ 0x200000 8001f24: 46b4 mov ip, r6 8001f26: 0052 lsls r2, r2, #1 8001f28: eb02 72d3 add.w r2, r2, r3, lsr #31 8001f2c: 107f asrs r7, r7, #1 8001f2e: 005b lsls r3, r3, #1 8001f30: eb0c 0001 add.w r0, ip, r1 8001f34: 4290 cmp r0, r2 8001f36: ea4f 75d3 mov.w r5, r3, lsr #31 8001f3a: ea4f 0343 mov.w r3, r3, lsl #1 8001f3e: dc03 bgt.n 8001f48 <__ieee754_sqrt+0x64> 8001f40: eb00 0c01 add.w ip, r0, r1 8001f44: 1a12 subs r2, r2, r0 8001f46: 440e add r6, r1 8001f48: 3c01 subs r4, #1 8001f4a: eb05 0242 add.w r2, r5, r2, lsl #1 8001f4e: ea4f 0151 mov.w r1, r1, lsr #1 8001f52: d1ed bne.n 8001f30 <__ieee754_sqrt+0x4c> 8001f54: 2520 movs r5, #32 8001f56: f04f 4000 mov.w r0, #2147483648 @ 0x80000000 8001f5a: 46a0 mov r8, r4 8001f5c: e00a b.n 8001f74 <__ieee754_sqrt+0x90> 8001f5e: d03c beq.n 8001fda <__ieee754_sqrt+0xf6> 8001f60: 0051 lsls r1, r2, #1 8001f62: eb01 71d3 add.w r1, r1, r3, lsr #31 8001f66: 3d01 subs r5, #1 8001f68: 460a mov r2, r1 8001f6a: ea4f 0343 mov.w r3, r3, lsl #1 8001f6e: ea4f 0050 mov.w r0, r0, lsr #1 8001f72: d03e beq.n 8001ff2 <__ieee754_sqrt+0x10e> 8001f74: 4594 cmp ip, r2 8001f76: eb08 0e00 add.w lr, r8, r0 8001f7a: daf0 bge.n 8001f5e <__ieee754_sqrt+0x7a> 8001f7c: f1be 0f00 cmp.w lr, #0 8001f80: eb0e 0800 add.w r8, lr, r0 8001f84: db0c blt.n 8001fa0 <__ieee754_sqrt+0xbc> 8001f86: 46e1 mov r9, ip 8001f88: eba2 010c sub.w r1, r2, ip 8001f8c: 46cc mov ip, r9 8001f8e: 459e cmp lr, r3 8001f90: bf88 it hi 8001f92: f101 31ff addhi.w r1, r1, #4294967295 @ 0xffffffff 8001f96: 0049 lsls r1, r1, #1 8001f98: eba3 030e sub.w r3, r3, lr 8001f9c: 4404 add r4, r0 8001f9e: e7e0 b.n 8001f62 <__ieee754_sqrt+0x7e> 8001fa0: f1b8 0f00 cmp.w r8, #0 8001fa4: dbef blt.n 8001f86 <__ieee754_sqrt+0xa2> 8001fa6: f10c 0901 add.w r9, ip, #1 8001faa: e7ed b.n 8001f88 <__ieee754_sqrt+0xa4> 8001fac: f021 4500 bic.w r5, r1, #2147483648 @ 0x80000000 8001fb0: 4305 orrs r5, r0 8001fb2: d03b beq.n 800202c <__ieee754_sqrt+0x148> 8001fb4: 2900 cmp r1, #0 8001fb6: d162 bne.n 800207e <__ieee754_sqrt+0x19a> 8001fb8: 0ada lsrs r2, r3, #11 8001fba: 3c15 subs r4, #21 8001fbc: 055b lsls r3, r3, #21 8001fbe: 2a00 cmp r2, #0 8001fc0: d0fa beq.n 8001fb8 <__ieee754_sqrt+0xd4> 8001fc2: 02d6 lsls r6, r2, #11 8001fc4: 4620 mov r0, r4 8001fc6: 4619 mov r1, r3 8001fc8: 4614 mov r4, r2 8001fca: d561 bpl.n 8002090 <__ieee754_sqrt+0x1ac> 8001fcc: 2520 movs r5, #32 8001fce: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8001fd2: 40e9 lsrs r1, r5 8001fd4: 1a80 subs r0, r0, r2 8001fd6: 430c orrs r4, r1 8001fd8: e794 b.n 8001f04 <__ieee754_sqrt+0x20> 8001fda: 459e cmp lr, r3 8001fdc: d902 bls.n 8001fe4 <__ieee754_sqrt+0x100> 8001fde: ea4f 014c mov.w r1, ip, lsl #1 8001fe2: e7be b.n 8001f62 <__ieee754_sqrt+0x7e> 8001fe4: f1be 0f00 cmp.w lr, #0 8001fe8: eb0e 0800 add.w r8, lr, r0 8001fec: db20 blt.n 8002030 <__ieee754_sqrt+0x14c> 8001fee: 2100 movs r1, #0 8001ff0: e7d2 b.n 8001f98 <__ieee754_sqrt+0xb4> 8001ff2: 4319 orrs r1, r3 8001ff4: d010 beq.n 8002018 <__ieee754_sqrt+0x134> 8001ff6: f8df a0bc ldr.w sl, [pc, #188] @ 80020b4 <__ieee754_sqrt+0x1d0> 8001ffa: e9da 0100 ldrd r0, r1, [sl] 8001ffe: e9da 2302 ldrd r2, r3, [sl, #8] 8002002: f000 fd15 bl 8002a30 <__aeabi_dsub> 8002006: e9da 8900 ldrd r8, r9, [sl] 800200a: 4602 mov r2, r0 800200c: 460b mov r3, r1 800200e: 4640 mov r0, r8 8002010: 4649 mov r1, r9 8002012: f001 f941 bl 8003298 <__aeabi_dcmple> 8002016: b9c8 cbnz r0, 800204c <__ieee754_sqrt+0x168> 8002018: 0865 lsrs r5, r4, #1 800201a: 1073 asrs r3, r6, #1 800201c: f103 537f add.w r3, r3, #1069547520 @ 0x3fc00000 8002020: f503 1300 add.w r3, r3, #2097152 @ 0x200000 8002024: eb03 5107 add.w r1, r3, r7, lsl #20 8002028: ea45 70c6 orr.w r0, r5, r6, lsl #31 800202c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8002030: f1b8 0f00 cmp.w r8, #0 8002034: dab7 bge.n 8001fa6 <__ieee754_sqrt+0xc2> 8002036: e7da b.n 8001fee <__ieee754_sqrt+0x10a> 8002038: 4602 mov r2, r0 800203a: 460b mov r3, r1 800203c: f000 feb0 bl 8002da0 <__aeabi_dmul> 8002040: 4632 mov r2, r6 8002042: 463b mov r3, r7 8002044: f000 fcf6 bl 8002a34 <__adddf3> 8002048: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800204c: f1b4 3fff cmp.w r4, #4294967295 @ 0xffffffff 8002050: e9da 0100 ldrd r0, r1, [sl] 8002054: e9da 2302 ldrd r2, r3, [sl, #8] 8002058: d026 beq.n 80020a8 <__ieee754_sqrt+0x1c4> 800205a: e9da 8900 ldrd r8, r9, [sl] 800205e: f000 fce9 bl 8002a34 <__adddf3> 8002062: 4602 mov r2, r0 8002064: 460b mov r3, r1 8002066: 4640 mov r0, r8 8002068: 4649 mov r1, r9 800206a: f001 f90b bl 8003284 <__aeabi_dcmplt> 800206e: b1e8 cbz r0, 80020ac <__ieee754_sqrt+0x1c8> 8002070: 1ca3 adds r3, r4, #2 8002072: f104 0502 add.w r5, r4, #2 8002076: bf08 it eq 8002078: 3601 addeq r6, #1 800207a: 086d lsrs r5, r5, #1 800207c: e7cd b.n 800201a <__ieee754_sqrt+0x136> 800207e: 460b mov r3, r1 8002080: f000 fcd6 bl 8002a30 <__aeabi_dsub> 8002084: 4602 mov r2, r0 8002086: 460b mov r3, r1 8002088: f000 ffb4 bl 8002ff4 <__aeabi_ddiv> 800208c: e7ce b.n 800202c <__ieee754_sqrt+0x148> 800208e: 4631 mov r1, r6 8002090: 2300 movs r3, #0 8002092: 0064 lsls r4, r4, #1 8002094: 02e5 lsls r5, r4, #11 8002096: 461a mov r2, r3 8002098: f103 0301 add.w r3, r3, #1 800209c: d5f9 bpl.n 8002092 <__ieee754_sqrt+0x1ae> 800209e: f1c3 0520 rsb r5, r3, #32 80020a2: fa01 f303 lsl.w r3, r1, r3 80020a6: e794 b.n 8001fd2 <__ieee754_sqrt+0xee> 80020a8: 3601 adds r6, #1 80020aa: e7b6 b.n 800201a <__ieee754_sqrt+0x136> 80020ac: 3401 adds r4, #1 80020ae: e7b3 b.n 8002018 <__ieee754_sqrt+0x134> 80020b0: 7ff00000 .word 0x7ff00000 80020b4: 08003a58 .word 0x08003a58 080020b8 <__ieee754_atan2>: 80020b8: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 80020bc: 4699 mov r9, r3 80020be: 4253 negs r3, r2 80020c0: 4f5f ldr r7, [pc, #380] @ (8002240 <__ieee754_atan2+0x188>) 80020c2: 4313 orrs r3, r2 80020c4: f029 4e00 bic.w lr, r9, #2147483648 @ 0x80000000 80020c8: ea4e 73d3 orr.w r3, lr, r3, lsr #31 80020cc: 42bb cmp r3, r7 80020ce: 4604 mov r4, r0 80020d0: 460d mov r5, r1 80020d2: 4690 mov r8, r2 80020d4: d83d bhi.n 8002152 <__ieee754_atan2+0x9a> 80020d6: 4246 negs r6, r0 80020d8: 4306 orrs r6, r0 80020da: f021 4a00 bic.w sl, r1, #2147483648 @ 0x80000000 80020de: ea4a 76d6 orr.w r6, sl, r6, lsr #31 80020e2: 42be cmp r6, r7 80020e4: 4603 mov r3, r0 80020e6: 468b mov fp, r1 80020e8: d833 bhi.n 8002152 <__ieee754_atan2+0x9a> 80020ea: f109 4640 add.w r6, r9, #3221225472 @ 0xc0000000 80020ee: f506 1680 add.w r6, r6, #1048576 @ 0x100000 80020f2: 4316 orrs r6, r2 80020f4: d03d beq.n 8002172 <__ieee754_atan2+0xba> 80020f6: ea4f 76a9 mov.w r6, r9, asr #30 80020fa: f006 0602 and.w r6, r6, #2 80020fe: ea5a 0303 orrs.w r3, sl, r3 8002102: ea46 76d1 orr.w r6, r6, r1, lsr #31 8002106: d02c beq.n 8002162 <__ieee754_atan2+0xaa> 8002108: ea5e 0202 orrs.w r2, lr, r2 800210c: d035 beq.n 800217a <__ieee754_atan2+0xc2> 800210e: 45be cmp lr, r7 8002110: d046 beq.n 80021a0 <__ieee754_atan2+0xe8> 8002112: 45ba cmp sl, r7 8002114: d031 beq.n 800217a <__ieee754_atan2+0xc2> 8002116: ebaa 0a0e sub.w sl, sl, lr 800211a: f1ba 7f74 cmp.w sl, #63963136 @ 0x3d00000 800211e: ea4f 532a mov.w r3, sl, asr #20 8002122: da39 bge.n 8002198 <__ieee754_atan2+0xe0> 8002124: f1b9 0f00 cmp.w r9, #0 8002128: da46 bge.n 80021b8 <__ieee754_atan2+0x100> 800212a: 333c adds r3, #60 @ 0x3c 800212c: da44 bge.n 80021b8 <__ieee754_atan2+0x100> 800212e: 2000 movs r0, #0 8002130: 2100 movs r1, #0 8002132: 2e01 cmp r6, #1 8002134: d058 beq.n 80021e8 <__ieee754_atan2+0x130> 8002136: 2e02 cmp r6, #2 8002138: d049 beq.n 80021ce <__ieee754_atan2+0x116> 800213a: b186 cbz r6, 800215e <__ieee754_atan2+0xa6> 800213c: a334 add r3, pc, #208 @ (adr r3, 8002210 <__ieee754_atan2+0x158>) 800213e: e9d3 2300 ldrd r2, r3, [r3] 8002142: f000 fc75 bl 8002a30 <__aeabi_dsub> 8002146: a334 add r3, pc, #208 @ (adr r3, 8002218 <__ieee754_atan2+0x160>) 8002148: e9d3 2300 ldrd r2, r3, [r3] 800214c: f000 fc70 bl 8002a30 <__aeabi_dsub> 8002150: e005 b.n 800215e <__ieee754_atan2+0xa6> 8002152: 4622 mov r2, r4 8002154: 462b mov r3, r5 8002156: 4640 mov r0, r8 8002158: 4649 mov r1, r9 800215a: f000 fc6b bl 8002a34 <__adddf3> 800215e: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002162: 2e02 cmp r6, #2 8002164: d010 beq.n 8002188 <__ieee754_atan2+0xd0> 8002166: 2e03 cmp r6, #3 8002168: d1f9 bne.n 800215e <__ieee754_atan2+0xa6> 800216a: a12d add r1, pc, #180 @ (adr r1, 8002220 <__ieee754_atan2+0x168>) 800216c: e9d1 0100 ldrd r0, r1, [r1] 8002170: e7f5 b.n 800215e <__ieee754_atan2+0xa6> 8002172: e8bd 4ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002176: f000 b88f b.w 8002298 800217a: f1bb 0f00 cmp.w fp, #0 800217e: db07 blt.n 8002190 <__ieee754_atan2+0xd8> 8002180: a129 add r1, pc, #164 @ (adr r1, 8002228 <__ieee754_atan2+0x170>) 8002182: e9d1 0100 ldrd r0, r1, [r1] 8002186: e7ea b.n 800215e <__ieee754_atan2+0xa6> 8002188: a123 add r1, pc, #140 @ (adr r1, 8002218 <__ieee754_atan2+0x160>) 800218a: e9d1 0100 ldrd r0, r1, [r1] 800218e: e7e6 b.n 800215e <__ieee754_atan2+0xa6> 8002190: a127 add r1, pc, #156 @ (adr r1, 8002230 <__ieee754_atan2+0x178>) 8002192: e9d1 0100 ldrd r0, r1, [r1] 8002196: e7e2 b.n 800215e <__ieee754_atan2+0xa6> 8002198: a123 add r1, pc, #140 @ (adr r1, 8002228 <__ieee754_atan2+0x170>) 800219a: e9d1 0100 ldrd r0, r1, [r1] 800219e: e7c8 b.n 8002132 <__ieee754_atan2+0x7a> 80021a0: 45f2 cmp sl, lr 80021a2: f106 36ff add.w r6, r6, #4294967295 @ 0xffffffff 80021a6: d023 beq.n 80021f0 <__ieee754_atan2+0x138> 80021a8: 2e02 cmp r6, #2 80021aa: d829 bhi.n 8002200 <__ieee754_atan2+0x148> 80021ac: 4b25 ldr r3, [pc, #148] @ (8002244 <__ieee754_atan2+0x18c>) 80021ae: eb03 03c6 add.w r3, r3, r6, lsl #3 80021b2: e9d3 0106 ldrd r0, r1, [r3, #24] 80021b6: e7d2 b.n 800215e <__ieee754_atan2+0xa6> 80021b8: 4642 mov r2, r8 80021ba: 464b mov r3, r9 80021bc: 4620 mov r0, r4 80021be: 4629 mov r1, r5 80021c0: f000 ff18 bl 8002ff4 <__aeabi_ddiv> 80021c4: f000 fc26 bl 8002a14 80021c8: f000 f866 bl 8002298 80021cc: e7b1 b.n 8002132 <__ieee754_atan2+0x7a> 80021ce: a310 add r3, pc, #64 @ (adr r3, 8002210 <__ieee754_atan2+0x158>) 80021d0: e9d3 2300 ldrd r2, r3, [r3] 80021d4: f000 fc2c bl 8002a30 <__aeabi_dsub> 80021d8: 4602 mov r2, r0 80021da: 460b mov r3, r1 80021dc: a10e add r1, pc, #56 @ (adr r1, 8002218 <__ieee754_atan2+0x160>) 80021de: e9d1 0100 ldrd r0, r1, [r1] 80021e2: f000 fc25 bl 8002a30 <__aeabi_dsub> 80021e6: e7ba b.n 800215e <__ieee754_atan2+0xa6> 80021e8: f101 4300 add.w r3, r1, #2147483648 @ 0x80000000 80021ec: 4619 mov r1, r3 80021ee: e7b6 b.n 800215e <__ieee754_atan2+0xa6> 80021f0: 2e02 cmp r6, #2 80021f2: d808 bhi.n 8002206 <__ieee754_atan2+0x14e> 80021f4: 4b13 ldr r3, [pc, #76] @ (8002244 <__ieee754_atan2+0x18c>) 80021f6: eb03 03c6 add.w r3, r3, r6, lsl #3 80021fa: e9d3 0100 ldrd r0, r1, [r3] 80021fe: e7ae b.n 800215e <__ieee754_atan2+0xa6> 8002200: 2000 movs r0, #0 8002202: 2100 movs r1, #0 8002204: e7ab b.n 800215e <__ieee754_atan2+0xa6> 8002206: a10c add r1, pc, #48 @ (adr r1, 8002238 <__ieee754_atan2+0x180>) 8002208: e9d1 0100 ldrd r0, r1, [r1] 800220c: e7a7 b.n 800215e <__ieee754_atan2+0xa6> 800220e: bf00 nop 8002210: 33145c07 .word 0x33145c07 8002214: 3ca1a626 .word 0x3ca1a626 8002218: 54442d18 .word 0x54442d18 800221c: 400921fb .word 0x400921fb 8002220: 54442d18 .word 0x54442d18 8002224: c00921fb .word 0xc00921fb 8002228: 54442d18 .word 0x54442d18 800222c: 3ff921fb .word 0x3ff921fb 8002230: 54442d18 .word 0x54442d18 8002234: bff921fb .word 0xbff921fb 8002238: 54442d18 .word 0x54442d18 800223c: 3fe921fb .word 0x3fe921fb 8002240: 7ff00000 .word 0x7ff00000 8002244: 08003a68 .word 0x08003a68 08002248 : 8002248: b5f8 push {r3, r4, r5, r6, r7, lr} 800224a: 4604 mov r4, r0 800224c: 460d mov r5, r1 800224e: f000 f9bb bl 80025c8 <__ieee754_asin> 8002252: 4622 mov r2, r4 8002254: 4606 mov r6, r0 8002256: 460f mov r7, r1 8002258: 462b mov r3, r5 800225a: 4620 mov r0, r4 800225c: 4629 mov r1, r5 800225e: f001 f839 bl 80032d4 <__aeabi_dcmpun> 8002262: b940 cbnz r0, 8002276 8002264: 4620 mov r0, r4 8002266: 4629 mov r1, r5 8002268: f000 fbd4 bl 8002a14 800226c: 2200 movs r2, #0 800226e: 4b08 ldr r3, [pc, #32] @ (8002290 ) 8002270: f001 f826 bl 80032c0 <__aeabi_dcmpgt> 8002274: b910 cbnz r0, 800227c 8002276: 4630 mov r0, r6 8002278: 4639 mov r1, r7 800227a: bdf8 pop {r3, r4, r5, r6, r7, pc} 800227c: f001 fbaa bl 80039d4 <__errno> 8002280: 2221 movs r2, #33 @ 0x21 8002282: 4603 mov r3, r0 8002284: 4803 ldr r0, [pc, #12] @ (8002294 ) 8002286: 601a str r2, [r3, #0] 8002288: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr} 800228c: f000 bbc6 b.w 8002a1c 8002290: 3ff00000 .word 0x3ff00000 8002294: 08003a98 .word 0x08003a98 08002298 : 8002298: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 800229c: 4bc0 ldr r3, [pc, #768] @ (80025a0 ) 800229e: f021 4600 bic.w r6, r1, #2147483648 @ 0x80000000 80022a2: 429e cmp r6, r3 80022a4: 4604 mov r4, r0 80022a6: 460d mov r5, r1 80022a8: 468a mov sl, r1 80022aa: d916 bls.n 80022da 80022ac: 4bbd ldr r3, [pc, #756] @ (80025a4 ) 80022ae: 429e cmp r6, r3 80022b0: d80b bhi.n 80022ca 80022b2: d008 beq.n 80022c6 80022b4: f1ba 0f00 cmp.w sl, #0 80022b8: f340 80bf ble.w 800243a 80022bc: a19c add r1, pc, #624 @ (adr r1, 8002530 ) 80022be: e9d1 0100 ldrd r0, r1, [r1] 80022c2: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80022c6: 2800 cmp r0, #0 80022c8: d0f4 beq.n 80022b4 80022ca: 4622 mov r2, r4 80022cc: 462b mov r3, r5 80022ce: 4620 mov r0, r4 80022d0: 4629 mov r1, r5 80022d2: f000 fbaf bl 8002a34 <__adddf3> 80022d6: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80022da: 4bb3 ldr r3, [pc, #716] @ (80025a8 ) 80022dc: 429e cmp r6, r3 80022de: f200 80b1 bhi.w 8002444 80022e2: f1a3 73de sub.w r3, r3, #29097984 @ 0x1bc0000 80022e6: 429e cmp r6, r3 80022e8: f240 8098 bls.w 800241c 80022ec: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff 80022f0: 4622 mov r2, r4 80022f2: 462b mov r3, r5 80022f4: 4620 mov r0, r4 80022f6: 4629 mov r1, r5 80022f8: f000 fd52 bl 8002da0 <__aeabi_dmul> 80022fc: 4602 mov r2, r0 80022fe: 460b mov r3, r1 8002300: 4680 mov r8, r0 8002302: 4689 mov r9, r1 8002304: f000 fd4c bl 8002da0 <__aeabi_dmul> 8002308: a38b add r3, pc, #556 @ (adr r3, 8002538 ) 800230a: e9d3 2300 ldrd r2, r3, [r3] 800230e: 4606 mov r6, r0 8002310: 460f mov r7, r1 8002312: f000 fd45 bl 8002da0 <__aeabi_dmul> 8002316: a38a add r3, pc, #552 @ (adr r3, 8002540 ) 8002318: e9d3 2300 ldrd r2, r3, [r3] 800231c: f000 fb8a bl 8002a34 <__adddf3> 8002320: 4632 mov r2, r6 8002322: 463b mov r3, r7 8002324: f000 fd3c bl 8002da0 <__aeabi_dmul> 8002328: a387 add r3, pc, #540 @ (adr r3, 8002548 ) 800232a: e9d3 2300 ldrd r2, r3, [r3] 800232e: f000 fb81 bl 8002a34 <__adddf3> 8002332: 4632 mov r2, r6 8002334: 463b mov r3, r7 8002336: f000 fd33 bl 8002da0 <__aeabi_dmul> 800233a: a385 add r3, pc, #532 @ (adr r3, 8002550 ) 800233c: e9d3 2300 ldrd r2, r3, [r3] 8002340: f000 fb78 bl 8002a34 <__adddf3> 8002344: 4632 mov r2, r6 8002346: 463b mov r3, r7 8002348: f000 fd2a bl 8002da0 <__aeabi_dmul> 800234c: a382 add r3, pc, #520 @ (adr r3, 8002558 ) 800234e: e9d3 2300 ldrd r2, r3, [r3] 8002352: f000 fb6f bl 8002a34 <__adddf3> 8002356: 4632 mov r2, r6 8002358: 463b mov r3, r7 800235a: f000 fd21 bl 8002da0 <__aeabi_dmul> 800235e: a380 add r3, pc, #512 @ (adr r3, 8002560 ) 8002360: e9d3 2300 ldrd r2, r3, [r3] 8002364: f000 fb66 bl 8002a34 <__adddf3> 8002368: 4642 mov r2, r8 800236a: 464b mov r3, r9 800236c: f000 fd18 bl 8002da0 <__aeabi_dmul> 8002370: a37d add r3, pc, #500 @ (adr r3, 8002568 ) 8002372: e9d3 2300 ldrd r2, r3, [r3] 8002376: 4680 mov r8, r0 8002378: 4689 mov r9, r1 800237a: 4630 mov r0, r6 800237c: 4639 mov r1, r7 800237e: f000 fd0f bl 8002da0 <__aeabi_dmul> 8002382: a37b add r3, pc, #492 @ (adr r3, 8002570 ) 8002384: e9d3 2300 ldrd r2, r3, [r3] 8002388: f000 fb52 bl 8002a30 <__aeabi_dsub> 800238c: 4632 mov r2, r6 800238e: 463b mov r3, r7 8002390: f000 fd06 bl 8002da0 <__aeabi_dmul> 8002394: a378 add r3, pc, #480 @ (adr r3, 8002578 ) 8002396: e9d3 2300 ldrd r2, r3, [r3] 800239a: f000 fb49 bl 8002a30 <__aeabi_dsub> 800239e: 4632 mov r2, r6 80023a0: 463b mov r3, r7 80023a2: f000 fcfd bl 8002da0 <__aeabi_dmul> 80023a6: a376 add r3, pc, #472 @ (adr r3, 8002580 ) 80023a8: e9d3 2300 ldrd r2, r3, [r3] 80023ac: f000 fb40 bl 8002a30 <__aeabi_dsub> 80023b0: 4632 mov r2, r6 80023b2: 463b mov r3, r7 80023b4: f000 fcf4 bl 8002da0 <__aeabi_dmul> 80023b8: a373 add r3, pc, #460 @ (adr r3, 8002588 ) 80023ba: e9d3 2300 ldrd r2, r3, [r3] 80023be: f000 fb37 bl 8002a30 <__aeabi_dsub> 80023c2: 4632 mov r2, r6 80023c4: 463b mov r3, r7 80023c6: f000 fceb bl 8002da0 <__aeabi_dmul> 80023ca: 4602 mov r2, r0 80023cc: 460b mov r3, r1 80023ce: 4640 mov r0, r8 80023d0: 4649 mov r1, r9 80023d2: f000 fb2f bl 8002a34 <__adddf3> 80023d6: 4622 mov r2, r4 80023d8: 462b mov r3, r5 80023da: f000 fce1 bl 8002da0 <__aeabi_dmul> 80023de: f1bb 3fff cmp.w fp, #4294967295 @ 0xffffffff 80023e2: 4602 mov r2, r0 80023e4: 460b mov r3, r1 80023e6: d056 beq.n 8002496 80023e8: 4e70 ldr r6, [pc, #448] @ (80025ac ) 80023ea: eb06 06cb add.w r6, r6, fp, lsl #3 80023ee: e9d6 2308 ldrd r2, r3, [r6, #32] 80023f2: f000 fb1d bl 8002a30 <__aeabi_dsub> 80023f6: 4622 mov r2, r4 80023f8: 462b mov r3, r5 80023fa: f000 fb19 bl 8002a30 <__aeabi_dsub> 80023fe: 4602 mov r2, r0 8002400: 460b mov r3, r1 8002402: e9d6 0100 ldrd r0, r1, [r6] 8002406: f000 fb13 bl 8002a30 <__aeabi_dsub> 800240a: f1ba 0f00 cmp.w sl, #0 800240e: f6bf af62 bge.w 80022d6 8002412: f101 4300 add.w r3, r1, #2147483648 @ 0x80000000 8002416: 4619 mov r1, r3 8002418: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 800241c: a35c add r3, pc, #368 @ (adr r3, 8002590 ) 800241e: e9d3 2300 ldrd r2, r3, [r3] 8002422: f000 fb07 bl 8002a34 <__adddf3> 8002426: 2200 movs r2, #0 8002428: 4b61 ldr r3, [pc, #388] @ (80025b0 ) 800242a: f000 ff49 bl 80032c0 <__aeabi_dcmpgt> 800242e: 2800 cmp r0, #0 8002430: f43f af5c beq.w 80022ec 8002434: 4620 mov r0, r4 8002436: 4629 mov r1, r5 8002438: e74d b.n 80022d6 800243a: a157 add r1, pc, #348 @ (adr r1, 8002598 ) 800243c: e9d1 0100 ldrd r0, r1, [r1] 8002440: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002444: f000 fae6 bl 8002a14 8002448: 4b5a ldr r3, [pc, #360] @ (80025b4 ) 800244a: 4604 mov r4, r0 800244c: 429e cmp r6, r3 800244e: 460d mov r5, r1 8002450: d827 bhi.n 80024a2 8002452: f5a3 2350 sub.w r3, r3, #851968 @ 0xd0000 8002456: 429e cmp r6, r3 8002458: d84e bhi.n 80024f8 800245a: 4602 mov r2, r0 800245c: 460b mov r3, r1 800245e: f000 fae9 bl 8002a34 <__adddf3> 8002462: 2200 movs r2, #0 8002464: 4b52 ldr r3, [pc, #328] @ (80025b0 ) 8002466: f000 fae3 bl 8002a30 <__aeabi_dsub> 800246a: 4602 mov r2, r0 800246c: 460b mov r3, r1 800246e: 4620 mov r0, r4 8002470: 4629 mov r1, r5 8002472: 4614 mov r4, r2 8002474: 461d mov r5, r3 8002476: 2200 movs r2, #0 8002478: f04f 4380 mov.w r3, #1073741824 @ 0x40000000 800247c: f000 fada bl 8002a34 <__adddf3> 8002480: 4602 mov r2, r0 8002482: 460b mov r3, r1 8002484: 4620 mov r0, r4 8002486: 4629 mov r1, r5 8002488: f000 fdb4 bl 8002ff4 <__aeabi_ddiv> 800248c: f04f 0b00 mov.w fp, #0 8002490: 4604 mov r4, r0 8002492: 460d mov r5, r1 8002494: e72c b.n 80022f0 8002496: 4620 mov r0, r4 8002498: 4629 mov r1, r5 800249a: f000 fac9 bl 8002a30 <__aeabi_dsub> 800249e: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc} 80024a2: 4b45 ldr r3, [pc, #276] @ (80025b8 ) 80024a4: 429e cmp r6, r3 80024a6: d21c bcs.n 80024e2 80024a8: 2200 movs r2, #0 80024aa: 4b44 ldr r3, [pc, #272] @ (80025bc ) 80024ac: f000 fac0 bl 8002a30 <__aeabi_dsub> 80024b0: 4602 mov r2, r0 80024b2: 460b mov r3, r1 80024b4: 4620 mov r0, r4 80024b6: 4629 mov r1, r5 80024b8: 4614 mov r4, r2 80024ba: 461d mov r5, r3 80024bc: 2200 movs r2, #0 80024be: 4b3f ldr r3, [pc, #252] @ (80025bc ) 80024c0: f000 fc6e bl 8002da0 <__aeabi_dmul> 80024c4: 2200 movs r2, #0 80024c6: 4b3a ldr r3, [pc, #232] @ (80025b0 ) 80024c8: f000 fab4 bl 8002a34 <__adddf3> 80024cc: 4602 mov r2, r0 80024ce: 460b mov r3, r1 80024d0: 4620 mov r0, r4 80024d2: 4629 mov r1, r5 80024d4: f000 fd8e bl 8002ff4 <__aeabi_ddiv> 80024d8: f04f 0b02 mov.w fp, #2 80024dc: 4604 mov r4, r0 80024de: 460d mov r5, r1 80024e0: e706 b.n 80022f0 80024e2: 4602 mov r2, r0 80024e4: 460b mov r3, r1 80024e6: 2000 movs r0, #0 80024e8: 4935 ldr r1, [pc, #212] @ (80025c0 ) 80024ea: f000 fd83 bl 8002ff4 <__aeabi_ddiv> 80024ee: f04f 0b03 mov.w fp, #3 80024f2: 4604 mov r4, r0 80024f4: 460d mov r5, r1 80024f6: e6fb b.n 80022f0 80024f8: 2200 movs r2, #0 80024fa: 4b2d ldr r3, [pc, #180] @ (80025b0 ) 80024fc: f000 fa98 bl 8002a30 <__aeabi_dsub> 8002500: 4602 mov r2, r0 8002502: 460b mov r3, r1 8002504: 4620 mov r0, r4 8002506: 4629 mov r1, r5 8002508: 4614 mov r4, r2 800250a: 461d mov r5, r3 800250c: 2200 movs r2, #0 800250e: 4b28 ldr r3, [pc, #160] @ (80025b0 ) 8002510: f000 fa90 bl 8002a34 <__adddf3> 8002514: 4602 mov r2, r0 8002516: 460b mov r3, r1 8002518: 4620 mov r0, r4 800251a: 4629 mov r1, r5 800251c: f000 fd6a bl 8002ff4 <__aeabi_ddiv> 8002520: f04f 0b01 mov.w fp, #1 8002524: 4604 mov r4, r0 8002526: 460d mov r5, r1 8002528: e6e2 b.n 80022f0 800252a: bf00 nop 800252c: f3af 8000 nop.w 8002530: 54442d18 .word 0x54442d18 8002534: 3ff921fb .word 0x3ff921fb 8002538: e322da11 .word 0xe322da11 800253c: 3f90ad3a .word 0x3f90ad3a 8002540: 24760deb .word 0x24760deb 8002544: 3fa97b4b .word 0x3fa97b4b 8002548: a0d03d51 .word 0xa0d03d51 800254c: 3fb10d66 .word 0x3fb10d66 8002550: c54c206e .word 0xc54c206e 8002554: 3fb745cd .word 0x3fb745cd 8002558: 920083ff .word 0x920083ff 800255c: 3fc24924 .word 0x3fc24924 8002560: 5555550d .word 0x5555550d 8002564: 3fd55555 .word 0x3fd55555 8002568: 2c6a6c2f .word 0x2c6a6c2f 800256c: bfa2b444 .word 0xbfa2b444 8002570: 52defd9a .word 0x52defd9a 8002574: 3fadde2d .word 0x3fadde2d 8002578: af749a6d .word 0xaf749a6d 800257c: 3fb3b0f2 .word 0x3fb3b0f2 8002580: fe231671 .word 0xfe231671 8002584: 3fbc71c6 .word 0x3fbc71c6 8002588: 9998ebc4 .word 0x9998ebc4 800258c: 3fc99999 .word 0x3fc99999 8002590: 8800759c .word 0x8800759c 8002594: 7e37e43c .word 0x7e37e43c 8002598: 54442d18 .word 0x54442d18 800259c: bff921fb .word 0xbff921fb 80025a0: 440fffff .word 0x440fffff 80025a4: 7ff00000 .word 0x7ff00000 80025a8: 3fdbffff .word 0x3fdbffff 80025ac: 08003aa0 .word 0x08003aa0 80025b0: 3ff00000 .word 0x3ff00000 80025b4: 3ff2ffff .word 0x3ff2ffff 80025b8: 40038000 .word 0x40038000 80025bc: 3ff80000 .word 0x3ff80000 80025c0: bff00000 .word 0xbff00000 80025c4: 00000000 .word 0x00000000 080025c8 <__ieee754_asin>: 80025c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80025cc: 4bbe ldr r3, [pc, #760] @ (80028c8 <__ieee754_asin+0x300>) 80025ce: f021 4800 bic.w r8, r1, #2147483648 @ 0x80000000 80025d2: 4598 cmp r8, r3 80025d4: 4604 mov r4, r0 80025d6: 460d mov r5, r1 80025d8: b085 sub sp, #20 80025da: d928 bls.n 800262e <__ieee754_asin+0x66> 80025dc: f108 4840 add.w r8, r8, #3221225472 @ 0xc0000000 80025e0: f508 1880 add.w r8, r8, #1048576 @ 0x100000 80025e4: ea58 0800 orrs.w r8, r8, r0 80025e8: d00a beq.n 8002600 <__ieee754_asin+0x38> 80025ea: 4602 mov r2, r0 80025ec: 460b mov r3, r1 80025ee: f000 fa1f bl 8002a30 <__aeabi_dsub> 80025f2: 4602 mov r2, r0 80025f4: 460b mov r3, r1 80025f6: f000 fcfd bl 8002ff4 <__aeabi_ddiv> 80025fa: b005 add sp, #20 80025fc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002600: a395 add r3, pc, #596 @ (adr r3, 8002858 <__ieee754_asin+0x290>) 8002602: e9d3 2300 ldrd r2, r3, [r3] 8002606: f000 fbcb bl 8002da0 <__aeabi_dmul> 800260a: a395 add r3, pc, #596 @ (adr r3, 8002860 <__ieee754_asin+0x298>) 800260c: e9d3 2300 ldrd r2, r3, [r3] 8002610: 4606 mov r6, r0 8002612: 460f mov r7, r1 8002614: 4620 mov r0, r4 8002616: 4629 mov r1, r5 8002618: f000 fbc2 bl 8002da0 <__aeabi_dmul> 800261c: 4602 mov r2, r0 800261e: 460b mov r3, r1 8002620: 4630 mov r0, r6 8002622: 4639 mov r1, r7 8002624: f000 fa06 bl 8002a34 <__adddf3> 8002628: b005 add sp, #20 800262a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800262e: 4ba7 ldr r3, [pc, #668] @ (80028cc <__ieee754_asin+0x304>) 8002630: 468a mov sl, r1 8002632: 4598 cmp r8, r3 8002634: d80f bhi.n 8002656 <__ieee754_asin+0x8e> 8002636: f1b8 5f79 cmp.w r8, #1044381696 @ 0x3e400000 800263a: f080 814f bcs.w 80028dc <__ieee754_asin+0x314> 800263e: a38a add r3, pc, #552 @ (adr r3, 8002868 <__ieee754_asin+0x2a0>) 8002640: e9d3 2300 ldrd r2, r3, [r3] 8002644: f000 f9f6 bl 8002a34 <__adddf3> 8002648: 2200 movs r2, #0 800264a: 4ba1 ldr r3, [pc, #644] @ (80028d0 <__ieee754_asin+0x308>) 800264c: f000 fe38 bl 80032c0 <__aeabi_dcmpgt> 8002650: 2800 cmp r0, #0 8002652: f040 80fe bne.w 8002852 <__ieee754_asin+0x28a> 8002656: 4620 mov r0, r4 8002658: 4629 mov r1, r5 800265a: f000 f9db bl 8002a14 800265e: 4602 mov r2, r0 8002660: 460b mov r3, r1 8002662: 2000 movs r0, #0 8002664: 499a ldr r1, [pc, #616] @ (80028d0 <__ieee754_asin+0x308>) 8002666: f000 f9e3 bl 8002a30 <__aeabi_dsub> 800266a: 2200 movs r2, #0 800266c: 4b99 ldr r3, [pc, #612] @ (80028d4 <__ieee754_asin+0x30c>) 800266e: f000 fb97 bl 8002da0 <__aeabi_dmul> 8002672: a37f add r3, pc, #508 @ (adr r3, 8002870 <__ieee754_asin+0x2a8>) 8002674: e9d3 2300 ldrd r2, r3, [r3] 8002678: 4604 mov r4, r0 800267a: 460d mov r5, r1 800267c: f000 fb90 bl 8002da0 <__aeabi_dmul> 8002680: a37d add r3, pc, #500 @ (adr r3, 8002878 <__ieee754_asin+0x2b0>) 8002682: e9d3 2300 ldrd r2, r3, [r3] 8002686: f000 f9d5 bl 8002a34 <__adddf3> 800268a: 4622 mov r2, r4 800268c: 462b mov r3, r5 800268e: f000 fb87 bl 8002da0 <__aeabi_dmul> 8002692: a37b add r3, pc, #492 @ (adr r3, 8002880 <__ieee754_asin+0x2b8>) 8002694: e9d3 2300 ldrd r2, r3, [r3] 8002698: f000 f9ca bl 8002a30 <__aeabi_dsub> 800269c: 4622 mov r2, r4 800269e: 462b mov r3, r5 80026a0: f000 fb7e bl 8002da0 <__aeabi_dmul> 80026a4: a378 add r3, pc, #480 @ (adr r3, 8002888 <__ieee754_asin+0x2c0>) 80026a6: e9d3 2300 ldrd r2, r3, [r3] 80026aa: f000 f9c3 bl 8002a34 <__adddf3> 80026ae: 4622 mov r2, r4 80026b0: 462b mov r3, r5 80026b2: f000 fb75 bl 8002da0 <__aeabi_dmul> 80026b6: a376 add r3, pc, #472 @ (adr r3, 8002890 <__ieee754_asin+0x2c8>) 80026b8: e9d3 2300 ldrd r2, r3, [r3] 80026bc: f000 f9b8 bl 8002a30 <__aeabi_dsub> 80026c0: 4622 mov r2, r4 80026c2: 462b mov r3, r5 80026c4: f000 fb6c bl 8002da0 <__aeabi_dmul> 80026c8: a373 add r3, pc, #460 @ (adr r3, 8002898 <__ieee754_asin+0x2d0>) 80026ca: e9d3 2300 ldrd r2, r3, [r3] 80026ce: f000 f9b1 bl 8002a34 <__adddf3> 80026d2: 4622 mov r2, r4 80026d4: 462b mov r3, r5 80026d6: f000 fb63 bl 8002da0 <__aeabi_dmul> 80026da: a371 add r3, pc, #452 @ (adr r3, 80028a0 <__ieee754_asin+0x2d8>) 80026dc: e9d3 2300 ldrd r2, r3, [r3] 80026e0: e9cd 0100 strd r0, r1, [sp] 80026e4: 4620 mov r0, r4 80026e6: 4629 mov r1, r5 80026e8: f000 fb5a bl 8002da0 <__aeabi_dmul> 80026ec: a36e add r3, pc, #440 @ (adr r3, 80028a8 <__ieee754_asin+0x2e0>) 80026ee: e9d3 2300 ldrd r2, r3, [r3] 80026f2: f000 f99d bl 8002a30 <__aeabi_dsub> 80026f6: 4622 mov r2, r4 80026f8: 462b mov r3, r5 80026fa: f000 fb51 bl 8002da0 <__aeabi_dmul> 80026fe: a36c add r3, pc, #432 @ (adr r3, 80028b0 <__ieee754_asin+0x2e8>) 8002700: e9d3 2300 ldrd r2, r3, [r3] 8002704: f000 f996 bl 8002a34 <__adddf3> 8002708: 4622 mov r2, r4 800270a: 462b mov r3, r5 800270c: f000 fb48 bl 8002da0 <__aeabi_dmul> 8002710: a369 add r3, pc, #420 @ (adr r3, 80028b8 <__ieee754_asin+0x2f0>) 8002712: e9d3 2300 ldrd r2, r3, [r3] 8002716: f000 f98b bl 8002a30 <__aeabi_dsub> 800271a: 4622 mov r2, r4 800271c: 462b mov r3, r5 800271e: f000 fb3f bl 8002da0 <__aeabi_dmul> 8002722: 2200 movs r2, #0 8002724: 4b6a ldr r3, [pc, #424] @ (80028d0 <__ieee754_asin+0x308>) 8002726: f000 f985 bl 8002a34 <__adddf3> 800272a: e9cd 0102 strd r0, r1, [sp, #8] 800272e: 4620 mov r0, r4 8002730: 4629 mov r1, r5 8002732: f7ff fbd7 bl 8001ee4 <__ieee754_sqrt> 8002736: f8df c1a0 ldr.w ip, [pc, #416] @ 80028d8 <__ieee754_asin+0x310> 800273a: 4606 mov r6, r0 800273c: 45e0 cmp r8, ip 800273e: 460f mov r7, r1 8002740: d868 bhi.n 8002814 <__ieee754_asin+0x24c> 8002742: 4602 mov r2, r0 8002744: 460b mov r3, r1 8002746: f000 f975 bl 8002a34 <__adddf3> 800274a: e9dd 2302 ldrd r2, r3, [sp, #8] 800274e: 468c mov ip, r1 8002750: 4683 mov fp, r0 8002752: e9dd 0100 ldrd r0, r1, [sp] 8002756: e9cd bc00 strd fp, ip, [sp] 800275a: f000 fc4b bl 8002ff4 <__aeabi_ddiv> 800275e: 4602 mov r2, r0 8002760: 460b mov r3, r1 8002762: e9dd 0100 ldrd r0, r1, [sp] 8002766: f000 fb1b bl 8002da0 <__aeabi_dmul> 800276a: f04f 0800 mov.w r8, #0 800276e: e9cd 0100 strd r0, r1, [sp] 8002772: 4642 mov r2, r8 8002774: 463b mov r3, r7 8002776: 4640 mov r0, r8 8002778: 4639 mov r1, r7 800277a: f000 fb11 bl 8002da0 <__aeabi_dmul> 800277e: 4602 mov r2, r0 8002780: 460b mov r3, r1 8002782: 4620 mov r0, r4 8002784: 4629 mov r1, r5 8002786: f000 f953 bl 8002a30 <__aeabi_dsub> 800278a: 4642 mov r2, r8 800278c: 4604 mov r4, r0 800278e: 460d mov r5, r1 8002790: 463b mov r3, r7 8002792: 4630 mov r0, r6 8002794: 4639 mov r1, r7 8002796: f000 f94d bl 8002a34 <__adddf3> 800279a: 4602 mov r2, r0 800279c: 460b mov r3, r1 800279e: 4620 mov r0, r4 80027a0: 4629 mov r1, r5 80027a2: f000 fc27 bl 8002ff4 <__aeabi_ddiv> 80027a6: 4602 mov r2, r0 80027a8: 460b mov r3, r1 80027aa: f000 f943 bl 8002a34 <__adddf3> 80027ae: 4602 mov r2, r0 80027b0: 460b mov r3, r1 80027b2: a12b add r1, pc, #172 @ (adr r1, 8002860 <__ieee754_asin+0x298>) 80027b4: e9d1 0100 ldrd r0, r1, [r1] 80027b8: f000 f93a bl 8002a30 <__aeabi_dsub> 80027bc: 4602 mov r2, r0 80027be: 460b mov r3, r1 80027c0: e9dd 0100 ldrd r0, r1, [sp] 80027c4: f000 f934 bl 8002a30 <__aeabi_dsub> 80027c8: 4642 mov r2, r8 80027ca: 4604 mov r4, r0 80027cc: 460d mov r5, r1 80027ce: 463b mov r3, r7 80027d0: 4640 mov r0, r8 80027d2: 4639 mov r1, r7 80027d4: f000 f92e bl 8002a34 <__adddf3> 80027d8: 4602 mov r2, r0 80027da: 460b mov r3, r1 80027dc: a138 add r1, pc, #224 @ (adr r1, 80028c0 <__ieee754_asin+0x2f8>) 80027de: e9d1 0100 ldrd r0, r1, [r1] 80027e2: f000 f925 bl 8002a30 <__aeabi_dsub> 80027e6: 4602 mov r2, r0 80027e8: 460b mov r3, r1 80027ea: 4620 mov r0, r4 80027ec: 4629 mov r1, r5 80027ee: f000 f91f bl 8002a30 <__aeabi_dsub> 80027f2: 4602 mov r2, r0 80027f4: 460b mov r3, r1 80027f6: a132 add r1, pc, #200 @ (adr r1, 80028c0 <__ieee754_asin+0x2f8>) 80027f8: e9d1 0100 ldrd r0, r1, [r1] 80027fc: f000 f918 bl 8002a30 <__aeabi_dsub> 8002800: f1ba 0f00 cmp.w sl, #0 8002804: f73f aef9 bgt.w 80025fa <__ieee754_asin+0x32> 8002808: f101 4300 add.w r3, r1, #2147483648 @ 0x80000000 800280c: 4619 mov r1, r3 800280e: b005 add sp, #20 8002810: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8002814: e9dd 2302 ldrd r2, r3, [sp, #8] 8002818: e9dd 0100 ldrd r0, r1, [sp] 800281c: f000 fbea bl 8002ff4 <__aeabi_ddiv> 8002820: 4632 mov r2, r6 8002822: 463b mov r3, r7 8002824: f000 fabc bl 8002da0 <__aeabi_dmul> 8002828: 4632 mov r2, r6 800282a: 463b mov r3, r7 800282c: f000 f902 bl 8002a34 <__adddf3> 8002830: 4602 mov r2, r0 8002832: 460b mov r3, r1 8002834: f000 f8fe bl 8002a34 <__adddf3> 8002838: a309 add r3, pc, #36 @ (adr r3, 8002860 <__ieee754_asin+0x298>) 800283a: e9d3 2300 ldrd r2, r3, [r3] 800283e: f000 f8f7 bl 8002a30 <__aeabi_dsub> 8002842: 4602 mov r2, r0 8002844: 460b mov r3, r1 8002846: a104 add r1, pc, #16 @ (adr r1, 8002858 <__ieee754_asin+0x290>) 8002848: e9d1 0100 ldrd r0, r1, [r1] 800284c: f000 f8f0 bl 8002a30 <__aeabi_dsub> 8002850: e7d6 b.n 8002800 <__ieee754_asin+0x238> 8002852: 4620 mov r0, r4 8002854: 4629 mov r1, r5 8002856: e6d0 b.n 80025fa <__ieee754_asin+0x32> 8002858: 54442d18 .word 0x54442d18 800285c: 3ff921fb .word 0x3ff921fb 8002860: 33145c07 .word 0x33145c07 8002864: 3c91a626 .word 0x3c91a626 8002868: 8800759c .word 0x8800759c 800286c: 7e37e43c .word 0x7e37e43c 8002870: 0dfdf709 .word 0x0dfdf709 8002874: 3f023de1 .word 0x3f023de1 8002878: 7501b288 .word 0x7501b288 800287c: 3f49efe0 .word 0x3f49efe0 8002880: b5688f3b .word 0xb5688f3b 8002884: 3fa48228 .word 0x3fa48228 8002888: 0e884455 .word 0x0e884455 800288c: 3fc9c155 .word 0x3fc9c155 8002890: 03eb6f7d .word 0x03eb6f7d 8002894: 3fd4d612 .word 0x3fd4d612 8002898: 55555555 .word 0x55555555 800289c: 3fc55555 .word 0x3fc55555 80028a0: b12e9282 .word 0xb12e9282 80028a4: 3fb3b8c5 .word 0x3fb3b8c5 80028a8: 1b8d0159 .word 0x1b8d0159 80028ac: 3fe6066c .word 0x3fe6066c 80028b0: 9c598ac8 .word 0x9c598ac8 80028b4: 40002ae5 .word 0x40002ae5 80028b8: 1c8a2d4b .word 0x1c8a2d4b 80028bc: 40033a27 .word 0x40033a27 80028c0: 54442d18 .word 0x54442d18 80028c4: 3fe921fb .word 0x3fe921fb 80028c8: 3fefffff .word 0x3fefffff 80028cc: 3fdfffff .word 0x3fdfffff 80028d0: 3ff00000 .word 0x3ff00000 80028d4: 3fe00000 .word 0x3fe00000 80028d8: 3fef3332 .word 0x3fef3332 80028dc: 4602 mov r2, r0 80028de: 460b mov r3, r1 80028e0: f000 fa5e bl 8002da0 <__aeabi_dmul> 80028e4: a336 add r3, pc, #216 @ (adr r3, 80029c0 <__ieee754_asin+0x3f8>) 80028e6: e9d3 2300 ldrd r2, r3, [r3] 80028ea: 4606 mov r6, r0 80028ec: 460f mov r7, r1 80028ee: f000 fa57 bl 8002da0 <__aeabi_dmul> 80028f2: a335 add r3, pc, #212 @ (adr r3, 80029c8 <__ieee754_asin+0x400>) 80028f4: e9d3 2300 ldrd r2, r3, [r3] 80028f8: f000 f89c bl 8002a34 <__adddf3> 80028fc: 4632 mov r2, r6 80028fe: 463b mov r3, r7 8002900: f000 fa4e bl 8002da0 <__aeabi_dmul> 8002904: a332 add r3, pc, #200 @ (adr r3, 80029d0 <__ieee754_asin+0x408>) 8002906: e9d3 2300 ldrd r2, r3, [r3] 800290a: f000 f891 bl 8002a30 <__aeabi_dsub> 800290e: 4632 mov r2, r6 8002910: 463b mov r3, r7 8002912: f000 fa45 bl 8002da0 <__aeabi_dmul> 8002916: a330 add r3, pc, #192 @ (adr r3, 80029d8 <__ieee754_asin+0x410>) 8002918: e9d3 2300 ldrd r2, r3, [r3] 800291c: f000 f88a bl 8002a34 <__adddf3> 8002920: 4632 mov r2, r6 8002922: 463b mov r3, r7 8002924: f000 fa3c bl 8002da0 <__aeabi_dmul> 8002928: a32d add r3, pc, #180 @ (adr r3, 80029e0 <__ieee754_asin+0x418>) 800292a: e9d3 2300 ldrd r2, r3, [r3] 800292e: f000 f87f bl 8002a30 <__aeabi_dsub> 8002932: 4632 mov r2, r6 8002934: 463b mov r3, r7 8002936: f000 fa33 bl 8002da0 <__aeabi_dmul> 800293a: a32b add r3, pc, #172 @ (adr r3, 80029e8 <__ieee754_asin+0x420>) 800293c: e9d3 2300 ldrd r2, r3, [r3] 8002940: f000 f878 bl 8002a34 <__adddf3> 8002944: 4632 mov r2, r6 8002946: 463b mov r3, r7 8002948: f000 fa2a bl 8002da0 <__aeabi_dmul> 800294c: a328 add r3, pc, #160 @ (adr r3, 80029f0 <__ieee754_asin+0x428>) 800294e: e9d3 2300 ldrd r2, r3, [r3] 8002952: 4680 mov r8, r0 8002954: 4689 mov r9, r1 8002956: 4630 mov r0, r6 8002958: 4639 mov r1, r7 800295a: f000 fa21 bl 8002da0 <__aeabi_dmul> 800295e: a326 add r3, pc, #152 @ (adr r3, 80029f8 <__ieee754_asin+0x430>) 8002960: e9d3 2300 ldrd r2, r3, [r3] 8002964: f000 f864 bl 8002a30 <__aeabi_dsub> 8002968: 4632 mov r2, r6 800296a: 463b mov r3, r7 800296c: f000 fa18 bl 8002da0 <__aeabi_dmul> 8002970: a323 add r3, pc, #140 @ (adr r3, 8002a00 <__ieee754_asin+0x438>) 8002972: e9d3 2300 ldrd r2, r3, [r3] 8002976: f000 f85d bl 8002a34 <__adddf3> 800297a: 4632 mov r2, r6 800297c: 463b mov r3, r7 800297e: f000 fa0f bl 8002da0 <__aeabi_dmul> 8002982: a321 add r3, pc, #132 @ (adr r3, 8002a08 <__ieee754_asin+0x440>) 8002984: e9d3 2300 ldrd r2, r3, [r3] 8002988: f000 f852 bl 8002a30 <__aeabi_dsub> 800298c: 4632 mov r2, r6 800298e: 463b mov r3, r7 8002990: f000 fa06 bl 8002da0 <__aeabi_dmul> 8002994: 2200 movs r2, #0 8002996: 4b1e ldr r3, [pc, #120] @ (8002a10 <__ieee754_asin+0x448>) 8002998: f000 f84c bl 8002a34 <__adddf3> 800299c: 4602 mov r2, r0 800299e: 460b mov r3, r1 80029a0: 4640 mov r0, r8 80029a2: 4649 mov r1, r9 80029a4: f000 fb26 bl 8002ff4 <__aeabi_ddiv> 80029a8: 4622 mov r2, r4 80029aa: 462b mov r3, r5 80029ac: f000 f9f8 bl 8002da0 <__aeabi_dmul> 80029b0: 4622 mov r2, r4 80029b2: 462b mov r3, r5 80029b4: f000 f83e bl 8002a34 <__adddf3> 80029b8: b005 add sp, #20 80029ba: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80029be: bf00 nop 80029c0: 0dfdf709 .word 0x0dfdf709 80029c4: 3f023de1 .word 0x3f023de1 80029c8: 7501b288 .word 0x7501b288 80029cc: 3f49efe0 .word 0x3f49efe0 80029d0: b5688f3b .word 0xb5688f3b 80029d4: 3fa48228 .word 0x3fa48228 80029d8: 0e884455 .word 0x0e884455 80029dc: 3fc9c155 .word 0x3fc9c155 80029e0: 03eb6f7d .word 0x03eb6f7d 80029e4: 3fd4d612 .word 0x3fd4d612 80029e8: 55555555 .word 0x55555555 80029ec: 3fc55555 .word 0x3fc55555 80029f0: b12e9282 .word 0xb12e9282 80029f4: 3fb3b8c5 .word 0x3fb3b8c5 80029f8: 1b8d0159 .word 0x1b8d0159 80029fc: 3fe6066c .word 0x3fe6066c 8002a00: 9c598ac8 .word 0x9c598ac8 8002a04: 40002ae5 .word 0x40002ae5 8002a08: 1c8a2d4b .word 0x1c8a2d4b 8002a0c: 40033a27 .word 0x40033a27 8002a10: 3ff00000 .word 0x3ff00000 08002a14 : 8002a14: f021 4300 bic.w r3, r1, #2147483648 @ 0x80000000 8002a18: 4619 mov r1, r3 8002a1a: 4770 bx lr 08002a1c : 8002a1c: 2000 movs r0, #0 8002a1e: 4901 ldr r1, [pc, #4] @ (8002a24 ) 8002a20: 4770 bx lr 8002a22: bf00 nop 8002a24: 7ff80000 .word 0x7ff80000 08002a28 <__aeabi_drsub>: 8002a28: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 8002a2c: e002 b.n 8002a34 <__adddf3> 8002a2e: bf00 nop 08002a30 <__aeabi_dsub>: 8002a30: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 08002a34 <__adddf3>: 8002a34: b530 push {r4, r5, lr} 8002a36: ea4f 0441 mov.w r4, r1, lsl #1 8002a3a: ea4f 0543 mov.w r5, r3, lsl #1 8002a3e: ea94 0f05 teq r4, r5 8002a42: bf08 it eq 8002a44: ea90 0f02 teqeq r0, r2 8002a48: bf1f itttt ne 8002a4a: ea54 0c00 orrsne.w ip, r4, r0 8002a4e: ea55 0c02 orrsne.w ip, r5, r2 8002a52: ea7f 5c64 mvnsne.w ip, r4, asr #21 8002a56: ea7f 5c65 mvnsne.w ip, r5, asr #21 8002a5a: f000 80e2 beq.w 8002c22 <__adddf3+0x1ee> 8002a5e: ea4f 5454 mov.w r4, r4, lsr #21 8002a62: ebd4 5555 rsbs r5, r4, r5, lsr #21 8002a66: bfb8 it lt 8002a68: 426d neglt r5, r5 8002a6a: dd0c ble.n 8002a86 <__adddf3+0x52> 8002a6c: 442c add r4, r5 8002a6e: ea80 0202 eor.w r2, r0, r2 8002a72: ea81 0303 eor.w r3, r1, r3 8002a76: ea82 0000 eor.w r0, r2, r0 8002a7a: ea83 0101 eor.w r1, r3, r1 8002a7e: ea80 0202 eor.w r2, r0, r2 8002a82: ea81 0303 eor.w r3, r1, r3 8002a86: 2d36 cmp r5, #54 @ 0x36 8002a88: bf88 it hi 8002a8a: bd30 pophi {r4, r5, pc} 8002a8c: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8002a90: ea4f 3101 mov.w r1, r1, lsl #12 8002a94: f44f 1c80 mov.w ip, #1048576 @ 0x100000 8002a98: ea4c 3111 orr.w r1, ip, r1, lsr #12 8002a9c: d002 beq.n 8002aa4 <__adddf3+0x70> 8002a9e: 4240 negs r0, r0 8002aa0: eb61 0141 sbc.w r1, r1, r1, lsl #1 8002aa4: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 8002aa8: ea4f 3303 mov.w r3, r3, lsl #12 8002aac: ea4c 3313 orr.w r3, ip, r3, lsr #12 8002ab0: d002 beq.n 8002ab8 <__adddf3+0x84> 8002ab2: 4252 negs r2, r2 8002ab4: eb63 0343 sbc.w r3, r3, r3, lsl #1 8002ab8: ea94 0f05 teq r4, r5 8002abc: f000 80a7 beq.w 8002c0e <__adddf3+0x1da> 8002ac0: f1a4 0401 sub.w r4, r4, #1 8002ac4: f1d5 0e20 rsbs lr, r5, #32 8002ac8: db0d blt.n 8002ae6 <__adddf3+0xb2> 8002aca: fa02 fc0e lsl.w ip, r2, lr 8002ace: fa22 f205 lsr.w r2, r2, r5 8002ad2: 1880 adds r0, r0, r2 8002ad4: f141 0100 adc.w r1, r1, #0 8002ad8: fa03 f20e lsl.w r2, r3, lr 8002adc: 1880 adds r0, r0, r2 8002ade: fa43 f305 asr.w r3, r3, r5 8002ae2: 4159 adcs r1, r3 8002ae4: e00e b.n 8002b04 <__adddf3+0xd0> 8002ae6: f1a5 0520 sub.w r5, r5, #32 8002aea: f10e 0e20 add.w lr, lr, #32 8002aee: 2a01 cmp r2, #1 8002af0: fa03 fc0e lsl.w ip, r3, lr 8002af4: bf28 it cs 8002af6: f04c 0c02 orrcs.w ip, ip, #2 8002afa: fa43 f305 asr.w r3, r3, r5 8002afe: 18c0 adds r0, r0, r3 8002b00: eb51 71e3 adcs.w r1, r1, r3, asr #31 8002b04: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8002b08: d507 bpl.n 8002b1a <__adddf3+0xe6> 8002b0a: f04f 0e00 mov.w lr, #0 8002b0e: f1dc 0c00 rsbs ip, ip, #0 8002b12: eb7e 0000 sbcs.w r0, lr, r0 8002b16: eb6e 0101 sbc.w r1, lr, r1 8002b1a: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 8002b1e: d31b bcc.n 8002b58 <__adddf3+0x124> 8002b20: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 8002b24: d30c bcc.n 8002b40 <__adddf3+0x10c> 8002b26: 0849 lsrs r1, r1, #1 8002b28: ea5f 0030 movs.w r0, r0, rrx 8002b2c: ea4f 0c3c mov.w ip, ip, rrx 8002b30: f104 0401 add.w r4, r4, #1 8002b34: ea4f 5244 mov.w r2, r4, lsl #21 8002b38: f512 0f80 cmn.w r2, #4194304 @ 0x400000 8002b3c: f080 809a bcs.w 8002c74 <__adddf3+0x240> 8002b40: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 8002b44: bf08 it eq 8002b46: ea5f 0c50 movseq.w ip, r0, lsr #1 8002b4a: f150 0000 adcs.w r0, r0, #0 8002b4e: eb41 5104 adc.w r1, r1, r4, lsl #20 8002b52: ea41 0105 orr.w r1, r1, r5 8002b56: bd30 pop {r4, r5, pc} 8002b58: ea5f 0c4c movs.w ip, ip, lsl #1 8002b5c: 4140 adcs r0, r0 8002b5e: eb41 0101 adc.w r1, r1, r1 8002b62: 3c01 subs r4, #1 8002b64: bf28 it cs 8002b66: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 8002b6a: d2e9 bcs.n 8002b40 <__adddf3+0x10c> 8002b6c: f091 0f00 teq r1, #0 8002b70: bf04 itt eq 8002b72: 4601 moveq r1, r0 8002b74: 2000 moveq r0, #0 8002b76: fab1 f381 clz r3, r1 8002b7a: bf08 it eq 8002b7c: 3320 addeq r3, #32 8002b7e: f1a3 030b sub.w r3, r3, #11 8002b82: f1b3 0220 subs.w r2, r3, #32 8002b86: da0c bge.n 8002ba2 <__adddf3+0x16e> 8002b88: 320c adds r2, #12 8002b8a: dd08 ble.n 8002b9e <__adddf3+0x16a> 8002b8c: f102 0c14 add.w ip, r2, #20 8002b90: f1c2 020c rsb r2, r2, #12 8002b94: fa01 f00c lsl.w r0, r1, ip 8002b98: fa21 f102 lsr.w r1, r1, r2 8002b9c: e00c b.n 8002bb8 <__adddf3+0x184> 8002b9e: f102 0214 add.w r2, r2, #20 8002ba2: bfd8 it le 8002ba4: f1c2 0c20 rsble ip, r2, #32 8002ba8: fa01 f102 lsl.w r1, r1, r2 8002bac: fa20 fc0c lsr.w ip, r0, ip 8002bb0: bfdc itt le 8002bb2: ea41 010c orrle.w r1, r1, ip 8002bb6: 4090 lslle r0, r2 8002bb8: 1ae4 subs r4, r4, r3 8002bba: bfa2 ittt ge 8002bbc: eb01 5104 addge.w r1, r1, r4, lsl #20 8002bc0: 4329 orrge r1, r5 8002bc2: bd30 popge {r4, r5, pc} 8002bc4: ea6f 0404 mvn.w r4, r4 8002bc8: 3c1f subs r4, #31 8002bca: da1c bge.n 8002c06 <__adddf3+0x1d2> 8002bcc: 340c adds r4, #12 8002bce: dc0e bgt.n 8002bee <__adddf3+0x1ba> 8002bd0: f104 0414 add.w r4, r4, #20 8002bd4: f1c4 0220 rsb r2, r4, #32 8002bd8: fa20 f004 lsr.w r0, r0, r4 8002bdc: fa01 f302 lsl.w r3, r1, r2 8002be0: ea40 0003 orr.w r0, r0, r3 8002be4: fa21 f304 lsr.w r3, r1, r4 8002be8: ea45 0103 orr.w r1, r5, r3 8002bec: bd30 pop {r4, r5, pc} 8002bee: f1c4 040c rsb r4, r4, #12 8002bf2: f1c4 0220 rsb r2, r4, #32 8002bf6: fa20 f002 lsr.w r0, r0, r2 8002bfa: fa01 f304 lsl.w r3, r1, r4 8002bfe: ea40 0003 orr.w r0, r0, r3 8002c02: 4629 mov r1, r5 8002c04: bd30 pop {r4, r5, pc} 8002c06: fa21 f004 lsr.w r0, r1, r4 8002c0a: 4629 mov r1, r5 8002c0c: bd30 pop {r4, r5, pc} 8002c0e: f094 0f00 teq r4, #0 8002c12: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 8002c16: bf06 itte eq 8002c18: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 8002c1c: 3401 addeq r4, #1 8002c1e: 3d01 subne r5, #1 8002c20: e74e b.n 8002ac0 <__adddf3+0x8c> 8002c22: ea7f 5c64 mvns.w ip, r4, asr #21 8002c26: bf18 it ne 8002c28: ea7f 5c65 mvnsne.w ip, r5, asr #21 8002c2c: d029 beq.n 8002c82 <__adddf3+0x24e> 8002c2e: ea94 0f05 teq r4, r5 8002c32: bf08 it eq 8002c34: ea90 0f02 teqeq r0, r2 8002c38: d005 beq.n 8002c46 <__adddf3+0x212> 8002c3a: ea54 0c00 orrs.w ip, r4, r0 8002c3e: bf04 itt eq 8002c40: 4619 moveq r1, r3 8002c42: 4610 moveq r0, r2 8002c44: bd30 pop {r4, r5, pc} 8002c46: ea91 0f03 teq r1, r3 8002c4a: bf1e ittt ne 8002c4c: 2100 movne r1, #0 8002c4e: 2000 movne r0, #0 8002c50: bd30 popne {r4, r5, pc} 8002c52: ea5f 5c54 movs.w ip, r4, lsr #21 8002c56: d105 bne.n 8002c64 <__adddf3+0x230> 8002c58: 0040 lsls r0, r0, #1 8002c5a: 4149 adcs r1, r1 8002c5c: bf28 it cs 8002c5e: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 8002c62: bd30 pop {r4, r5, pc} 8002c64: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8002c68: bf3c itt cc 8002c6a: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 8002c6e: bd30 popcc {r4, r5, pc} 8002c70: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8002c74: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8002c78: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 8002c7c: f04f 0000 mov.w r0, #0 8002c80: bd30 pop {r4, r5, pc} 8002c82: ea7f 5c64 mvns.w ip, r4, asr #21 8002c86: bf1a itte ne 8002c88: 4619 movne r1, r3 8002c8a: 4610 movne r0, r2 8002c8c: ea7f 5c65 mvnseq.w ip, r5, asr #21 8002c90: bf1c itt ne 8002c92: 460b movne r3, r1 8002c94: 4602 movne r2, r0 8002c96: ea50 3401 orrs.w r4, r0, r1, lsl #12 8002c9a: bf06 itte eq 8002c9c: ea52 3503 orrseq.w r5, r2, r3, lsl #12 8002ca0: ea91 0f03 teqeq r1, r3 8002ca4: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 8002ca8: bd30 pop {r4, r5, pc} 8002caa: bf00 nop 08002cac <__aeabi_ui2d>: 8002cac: f090 0f00 teq r0, #0 8002cb0: bf04 itt eq 8002cb2: 2100 moveq r1, #0 8002cb4: 4770 bxeq lr 8002cb6: b530 push {r4, r5, lr} 8002cb8: f44f 6480 mov.w r4, #1024 @ 0x400 8002cbc: f104 0432 add.w r4, r4, #50 @ 0x32 8002cc0: f04f 0500 mov.w r5, #0 8002cc4: f04f 0100 mov.w r1, #0 8002cc8: e750 b.n 8002b6c <__adddf3+0x138> 8002cca: bf00 nop 08002ccc <__aeabi_i2d>: 8002ccc: f090 0f00 teq r0, #0 8002cd0: bf04 itt eq 8002cd2: 2100 moveq r1, #0 8002cd4: 4770 bxeq lr 8002cd6: b530 push {r4, r5, lr} 8002cd8: f44f 6480 mov.w r4, #1024 @ 0x400 8002cdc: f104 0432 add.w r4, r4, #50 @ 0x32 8002ce0: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 8002ce4: bf48 it mi 8002ce6: 4240 negmi r0, r0 8002ce8: f04f 0100 mov.w r1, #0 8002cec: e73e b.n 8002b6c <__adddf3+0x138> 8002cee: bf00 nop 08002cf0 <__aeabi_f2d>: 8002cf0: 0042 lsls r2, r0, #1 8002cf2: ea4f 01e2 mov.w r1, r2, asr #3 8002cf6: ea4f 0131 mov.w r1, r1, rrx 8002cfa: ea4f 7002 mov.w r0, r2, lsl #28 8002cfe: bf1f itttt ne 8002d00: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 8002d04: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8002d08: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 8002d0c: 4770 bxne lr 8002d0e: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 8002d12: bf08 it eq 8002d14: 4770 bxeq lr 8002d16: f093 4f7f teq r3, #4278190080 @ 0xff000000 8002d1a: bf04 itt eq 8002d1c: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8002d20: 4770 bxeq lr 8002d22: b530 push {r4, r5, lr} 8002d24: f44f 7460 mov.w r4, #896 @ 0x380 8002d28: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8002d2c: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8002d30: e71c b.n 8002b6c <__adddf3+0x138> 8002d32: bf00 nop 08002d34 <__aeabi_ul2d>: 8002d34: ea50 0201 orrs.w r2, r0, r1 8002d38: bf08 it eq 8002d3a: 4770 bxeq lr 8002d3c: b530 push {r4, r5, lr} 8002d3e: f04f 0500 mov.w r5, #0 8002d42: e00a b.n 8002d5a <__aeabi_l2d+0x16> 08002d44 <__aeabi_l2d>: 8002d44: ea50 0201 orrs.w r2, r0, r1 8002d48: bf08 it eq 8002d4a: 4770 bxeq lr 8002d4c: b530 push {r4, r5, lr} 8002d4e: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 8002d52: d502 bpl.n 8002d5a <__aeabi_l2d+0x16> 8002d54: 4240 negs r0, r0 8002d56: eb61 0141 sbc.w r1, r1, r1, lsl #1 8002d5a: f44f 6480 mov.w r4, #1024 @ 0x400 8002d5e: f104 0432 add.w r4, r4, #50 @ 0x32 8002d62: ea5f 5c91 movs.w ip, r1, lsr #22 8002d66: f43f aed8 beq.w 8002b1a <__adddf3+0xe6> 8002d6a: f04f 0203 mov.w r2, #3 8002d6e: ea5f 0cdc movs.w ip, ip, lsr #3 8002d72: bf18 it ne 8002d74: 3203 addne r2, #3 8002d76: ea5f 0cdc movs.w ip, ip, lsr #3 8002d7a: bf18 it ne 8002d7c: 3203 addne r2, #3 8002d7e: eb02 02dc add.w r2, r2, ip, lsr #3 8002d82: f1c2 0320 rsb r3, r2, #32 8002d86: fa00 fc03 lsl.w ip, r0, r3 8002d8a: fa20 f002 lsr.w r0, r0, r2 8002d8e: fa01 fe03 lsl.w lr, r1, r3 8002d92: ea40 000e orr.w r0, r0, lr 8002d96: fa21 f102 lsr.w r1, r1, r2 8002d9a: 4414 add r4, r2 8002d9c: e6bd b.n 8002b1a <__adddf3+0xe6> 8002d9e: bf00 nop 08002da0 <__aeabi_dmul>: 8002da0: b570 push {r4, r5, r6, lr} 8002da2: f04f 0cff mov.w ip, #255 @ 0xff 8002da6: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8002daa: ea1c 5411 ands.w r4, ip, r1, lsr #20 8002dae: bf1d ittte ne 8002db0: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8002db4: ea94 0f0c teqne r4, ip 8002db8: ea95 0f0c teqne r5, ip 8002dbc: f000 f8de bleq 8002f7c <__aeabi_dmul+0x1dc> 8002dc0: 442c add r4, r5 8002dc2: ea81 0603 eor.w r6, r1, r3 8002dc6: ea21 514c bic.w r1, r1, ip, lsl #21 8002dca: ea23 534c bic.w r3, r3, ip, lsl #21 8002dce: ea50 3501 orrs.w r5, r0, r1, lsl #12 8002dd2: bf18 it ne 8002dd4: ea52 3503 orrsne.w r5, r2, r3, lsl #12 8002dd8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8002ddc: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8002de0: d038 beq.n 8002e54 <__aeabi_dmul+0xb4> 8002de2: fba0 ce02 umull ip, lr, r0, r2 8002de6: f04f 0500 mov.w r5, #0 8002dea: fbe1 e502 umlal lr, r5, r1, r2 8002dee: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 8002df2: fbe0 e503 umlal lr, r5, r0, r3 8002df6: f04f 0600 mov.w r6, #0 8002dfa: fbe1 5603 umlal r5, r6, r1, r3 8002dfe: f09c 0f00 teq ip, #0 8002e02: bf18 it ne 8002e04: f04e 0e01 orrne.w lr, lr, #1 8002e08: f1a4 04ff sub.w r4, r4, #255 @ 0xff 8002e0c: f5b6 7f00 cmp.w r6, #512 @ 0x200 8002e10: f564 7440 sbc.w r4, r4, #768 @ 0x300 8002e14: d204 bcs.n 8002e20 <__aeabi_dmul+0x80> 8002e16: ea5f 0e4e movs.w lr, lr, lsl #1 8002e1a: 416d adcs r5, r5 8002e1c: eb46 0606 adc.w r6, r6, r6 8002e20: ea42 21c6 orr.w r1, r2, r6, lsl #11 8002e24: ea41 5155 orr.w r1, r1, r5, lsr #21 8002e28: ea4f 20c5 mov.w r0, r5, lsl #11 8002e2c: ea40 505e orr.w r0, r0, lr, lsr #21 8002e30: ea4f 2ece mov.w lr, lr, lsl #11 8002e34: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8002e38: bf88 it hi 8002e3a: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 8002e3e: d81e bhi.n 8002e7e <__aeabi_dmul+0xde> 8002e40: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 8002e44: bf08 it eq 8002e46: ea5f 0e50 movseq.w lr, r0, lsr #1 8002e4a: f150 0000 adcs.w r0, r0, #0 8002e4e: eb41 5104 adc.w r1, r1, r4, lsl #20 8002e52: bd70 pop {r4, r5, r6, pc} 8002e54: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8002e58: ea46 0101 orr.w r1, r6, r1 8002e5c: ea40 0002 orr.w r0, r0, r2 8002e60: ea81 0103 eor.w r1, r1, r3 8002e64: ebb4 045c subs.w r4, r4, ip, lsr #1 8002e68: bfc2 ittt gt 8002e6a: ebd4 050c rsbsgt r5, r4, ip 8002e6e: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8002e72: bd70 popgt {r4, r5, r6, pc} 8002e74: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8002e78: f04f 0e00 mov.w lr, #0 8002e7c: 3c01 subs r4, #1 8002e7e: f300 80ab bgt.w 8002fd8 <__aeabi_dmul+0x238> 8002e82: f114 0f36 cmn.w r4, #54 @ 0x36 8002e86: bfde ittt le 8002e88: 2000 movle r0, #0 8002e8a: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 8002e8e: bd70 pople {r4, r5, r6, pc} 8002e90: f1c4 0400 rsb r4, r4, #0 8002e94: 3c20 subs r4, #32 8002e96: da35 bge.n 8002f04 <__aeabi_dmul+0x164> 8002e98: 340c adds r4, #12 8002e9a: dc1b bgt.n 8002ed4 <__aeabi_dmul+0x134> 8002e9c: f104 0414 add.w r4, r4, #20 8002ea0: f1c4 0520 rsb r5, r4, #32 8002ea4: fa00 f305 lsl.w r3, r0, r5 8002ea8: fa20 f004 lsr.w r0, r0, r4 8002eac: fa01 f205 lsl.w r2, r1, r5 8002eb0: ea40 0002 orr.w r0, r0, r2 8002eb4: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 8002eb8: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8002ebc: eb10 70d3 adds.w r0, r0, r3, lsr #31 8002ec0: fa21 f604 lsr.w r6, r1, r4 8002ec4: eb42 0106 adc.w r1, r2, r6 8002ec8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8002ecc: bf08 it eq 8002ece: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8002ed2: bd70 pop {r4, r5, r6, pc} 8002ed4: f1c4 040c rsb r4, r4, #12 8002ed8: f1c4 0520 rsb r5, r4, #32 8002edc: fa00 f304 lsl.w r3, r0, r4 8002ee0: fa20 f005 lsr.w r0, r0, r5 8002ee4: fa01 f204 lsl.w r2, r1, r4 8002ee8: ea40 0002 orr.w r0, r0, r2 8002eec: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8002ef0: eb10 70d3 adds.w r0, r0, r3, lsr #31 8002ef4: f141 0100 adc.w r1, r1, #0 8002ef8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8002efc: bf08 it eq 8002efe: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8002f02: bd70 pop {r4, r5, r6, pc} 8002f04: f1c4 0520 rsb r5, r4, #32 8002f08: fa00 f205 lsl.w r2, r0, r5 8002f0c: ea4e 0e02 orr.w lr, lr, r2 8002f10: fa20 f304 lsr.w r3, r0, r4 8002f14: fa01 f205 lsl.w r2, r1, r5 8002f18: ea43 0302 orr.w r3, r3, r2 8002f1c: fa21 f004 lsr.w r0, r1, r4 8002f20: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8002f24: fa21 f204 lsr.w r2, r1, r4 8002f28: ea20 0002 bic.w r0, r0, r2 8002f2c: eb00 70d3 add.w r0, r0, r3, lsr #31 8002f30: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8002f34: bf08 it eq 8002f36: ea20 70d3 biceq.w r0, r0, r3, lsr #31 8002f3a: bd70 pop {r4, r5, r6, pc} 8002f3c: f094 0f00 teq r4, #0 8002f40: d10f bne.n 8002f62 <__aeabi_dmul+0x1c2> 8002f42: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 8002f46: 0040 lsls r0, r0, #1 8002f48: eb41 0101 adc.w r1, r1, r1 8002f4c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8002f50: bf08 it eq 8002f52: 3c01 subeq r4, #1 8002f54: d0f7 beq.n 8002f46 <__aeabi_dmul+0x1a6> 8002f56: ea41 0106 orr.w r1, r1, r6 8002f5a: f095 0f00 teq r5, #0 8002f5e: bf18 it ne 8002f60: 4770 bxne lr 8002f62: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 8002f66: 0052 lsls r2, r2, #1 8002f68: eb43 0303 adc.w r3, r3, r3 8002f6c: f413 1f80 tst.w r3, #1048576 @ 0x100000 8002f70: bf08 it eq 8002f72: 3d01 subeq r5, #1 8002f74: d0f7 beq.n 8002f66 <__aeabi_dmul+0x1c6> 8002f76: ea43 0306 orr.w r3, r3, r6 8002f7a: 4770 bx lr 8002f7c: ea94 0f0c teq r4, ip 8002f80: ea0c 5513 and.w r5, ip, r3, lsr #20 8002f84: bf18 it ne 8002f86: ea95 0f0c teqne r5, ip 8002f8a: d00c beq.n 8002fa6 <__aeabi_dmul+0x206> 8002f8c: ea50 0641 orrs.w r6, r0, r1, lsl #1 8002f90: bf18 it ne 8002f92: ea52 0643 orrsne.w r6, r2, r3, lsl #1 8002f96: d1d1 bne.n 8002f3c <__aeabi_dmul+0x19c> 8002f98: ea81 0103 eor.w r1, r1, r3 8002f9c: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8002fa0: f04f 0000 mov.w r0, #0 8002fa4: bd70 pop {r4, r5, r6, pc} 8002fa6: ea50 0641 orrs.w r6, r0, r1, lsl #1 8002faa: bf06 itte eq 8002fac: 4610 moveq r0, r2 8002fae: 4619 moveq r1, r3 8002fb0: ea52 0643 orrsne.w r6, r2, r3, lsl #1 8002fb4: d019 beq.n 8002fea <__aeabi_dmul+0x24a> 8002fb6: ea94 0f0c teq r4, ip 8002fba: d102 bne.n 8002fc2 <__aeabi_dmul+0x222> 8002fbc: ea50 3601 orrs.w r6, r0, r1, lsl #12 8002fc0: d113 bne.n 8002fea <__aeabi_dmul+0x24a> 8002fc2: ea95 0f0c teq r5, ip 8002fc6: d105 bne.n 8002fd4 <__aeabi_dmul+0x234> 8002fc8: ea52 3603 orrs.w r6, r2, r3, lsl #12 8002fcc: bf1c itt ne 8002fce: 4610 movne r0, r2 8002fd0: 4619 movne r1, r3 8002fd2: d10a bne.n 8002fea <__aeabi_dmul+0x24a> 8002fd4: ea81 0103 eor.w r1, r1, r3 8002fd8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8002fdc: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8002fe0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 8002fe4: f04f 0000 mov.w r0, #0 8002fe8: bd70 pop {r4, r5, r6, pc} 8002fea: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8002fee: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 8002ff2: bd70 pop {r4, r5, r6, pc} 08002ff4 <__aeabi_ddiv>: 8002ff4: b570 push {r4, r5, r6, lr} 8002ff6: f04f 0cff mov.w ip, #255 @ 0xff 8002ffa: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8002ffe: ea1c 5411 ands.w r4, ip, r1, lsr #20 8003002: bf1d ittte ne 8003004: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8003008: ea94 0f0c teqne r4, ip 800300c: ea95 0f0c teqne r5, ip 8003010: f000 f8a7 bleq 8003162 <__aeabi_ddiv+0x16e> 8003014: eba4 0405 sub.w r4, r4, r5 8003018: ea81 0e03 eor.w lr, r1, r3 800301c: ea52 3503 orrs.w r5, r2, r3, lsl #12 8003020: ea4f 3101 mov.w r1, r1, lsl #12 8003024: f000 8088 beq.w 8003138 <__aeabi_ddiv+0x144> 8003028: ea4f 3303 mov.w r3, r3, lsl #12 800302c: f04f 5580 mov.w r5, #268435456 @ 0x10000000 8003030: ea45 1313 orr.w r3, r5, r3, lsr #4 8003034: ea43 6312 orr.w r3, r3, r2, lsr #24 8003038: ea4f 2202 mov.w r2, r2, lsl #8 800303c: ea45 1511 orr.w r5, r5, r1, lsr #4 8003040: ea45 6510 orr.w r5, r5, r0, lsr #24 8003044: ea4f 2600 mov.w r6, r0, lsl #8 8003048: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 800304c: 429d cmp r5, r3 800304e: bf08 it eq 8003050: 4296 cmpeq r6, r2 8003052: f144 04fd adc.w r4, r4, #253 @ 0xfd 8003056: f504 7440 add.w r4, r4, #768 @ 0x300 800305a: d202 bcs.n 8003062 <__aeabi_ddiv+0x6e> 800305c: 085b lsrs r3, r3, #1 800305e: ea4f 0232 mov.w r2, r2, rrx 8003062: 1ab6 subs r6, r6, r2 8003064: eb65 0503 sbc.w r5, r5, r3 8003068: 085b lsrs r3, r3, #1 800306a: ea4f 0232 mov.w r2, r2, rrx 800306e: f44f 1080 mov.w r0, #1048576 @ 0x100000 8003072: f44f 2c00 mov.w ip, #524288 @ 0x80000 8003076: ebb6 0e02 subs.w lr, r6, r2 800307a: eb75 0e03 sbcs.w lr, r5, r3 800307e: bf22 ittt cs 8003080: 1ab6 subcs r6, r6, r2 8003082: 4675 movcs r5, lr 8003084: ea40 000c orrcs.w r0, r0, ip 8003088: 085b lsrs r3, r3, #1 800308a: ea4f 0232 mov.w r2, r2, rrx 800308e: ebb6 0e02 subs.w lr, r6, r2 8003092: eb75 0e03 sbcs.w lr, r5, r3 8003096: bf22 ittt cs 8003098: 1ab6 subcs r6, r6, r2 800309a: 4675 movcs r5, lr 800309c: ea40 005c orrcs.w r0, r0, ip, lsr #1 80030a0: 085b lsrs r3, r3, #1 80030a2: ea4f 0232 mov.w r2, r2, rrx 80030a6: ebb6 0e02 subs.w lr, r6, r2 80030aa: eb75 0e03 sbcs.w lr, r5, r3 80030ae: bf22 ittt cs 80030b0: 1ab6 subcs r6, r6, r2 80030b2: 4675 movcs r5, lr 80030b4: ea40 009c orrcs.w r0, r0, ip, lsr #2 80030b8: 085b lsrs r3, r3, #1 80030ba: ea4f 0232 mov.w r2, r2, rrx 80030be: ebb6 0e02 subs.w lr, r6, r2 80030c2: eb75 0e03 sbcs.w lr, r5, r3 80030c6: bf22 ittt cs 80030c8: 1ab6 subcs r6, r6, r2 80030ca: 4675 movcs r5, lr 80030cc: ea40 00dc orrcs.w r0, r0, ip, lsr #3 80030d0: ea55 0e06 orrs.w lr, r5, r6 80030d4: d018 beq.n 8003108 <__aeabi_ddiv+0x114> 80030d6: ea4f 1505 mov.w r5, r5, lsl #4 80030da: ea45 7516 orr.w r5, r5, r6, lsr #28 80030de: ea4f 1606 mov.w r6, r6, lsl #4 80030e2: ea4f 03c3 mov.w r3, r3, lsl #3 80030e6: ea43 7352 orr.w r3, r3, r2, lsr #29 80030ea: ea4f 02c2 mov.w r2, r2, lsl #3 80030ee: ea5f 1c1c movs.w ip, ip, lsr #4 80030f2: d1c0 bne.n 8003076 <__aeabi_ddiv+0x82> 80030f4: f411 1f80 tst.w r1, #1048576 @ 0x100000 80030f8: d10b bne.n 8003112 <__aeabi_ddiv+0x11e> 80030fa: ea41 0100 orr.w r1, r1, r0 80030fe: f04f 0000 mov.w r0, #0 8003102: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 8003106: e7b6 b.n 8003076 <__aeabi_ddiv+0x82> 8003108: f411 1f80 tst.w r1, #1048576 @ 0x100000 800310c: bf04 itt eq 800310e: 4301 orreq r1, r0 8003110: 2000 moveq r0, #0 8003112: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 8003116: bf88 it hi 8003118: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 800311c: f63f aeaf bhi.w 8002e7e <__aeabi_dmul+0xde> 8003120: ebb5 0c03 subs.w ip, r5, r3 8003124: bf04 itt eq 8003126: ebb6 0c02 subseq.w ip, r6, r2 800312a: ea5f 0c50 movseq.w ip, r0, lsr #1 800312e: f150 0000 adcs.w r0, r0, #0 8003132: eb41 5104 adc.w r1, r1, r4, lsl #20 8003136: bd70 pop {r4, r5, r6, pc} 8003138: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 800313c: ea4e 3111 orr.w r1, lr, r1, lsr #12 8003140: eb14 045c adds.w r4, r4, ip, lsr #1 8003144: bfc2 ittt gt 8003146: ebd4 050c rsbsgt r5, r4, ip 800314a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 800314e: bd70 popgt {r4, r5, r6, pc} 8003150: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8003154: f04f 0e00 mov.w lr, #0 8003158: 3c01 subs r4, #1 800315a: e690 b.n 8002e7e <__aeabi_dmul+0xde> 800315c: ea45 0e06 orr.w lr, r5, r6 8003160: e68d b.n 8002e7e <__aeabi_dmul+0xde> 8003162: ea0c 5513 and.w r5, ip, r3, lsr #20 8003166: ea94 0f0c teq r4, ip 800316a: bf08 it eq 800316c: ea95 0f0c teqeq r5, ip 8003170: f43f af3b beq.w 8002fea <__aeabi_dmul+0x24a> 8003174: ea94 0f0c teq r4, ip 8003178: d10a bne.n 8003190 <__aeabi_ddiv+0x19c> 800317a: ea50 3401 orrs.w r4, r0, r1, lsl #12 800317e: f47f af34 bne.w 8002fea <__aeabi_dmul+0x24a> 8003182: ea95 0f0c teq r5, ip 8003186: f47f af25 bne.w 8002fd4 <__aeabi_dmul+0x234> 800318a: 4610 mov r0, r2 800318c: 4619 mov r1, r3 800318e: e72c b.n 8002fea <__aeabi_dmul+0x24a> 8003190: ea95 0f0c teq r5, ip 8003194: d106 bne.n 80031a4 <__aeabi_ddiv+0x1b0> 8003196: ea52 3503 orrs.w r5, r2, r3, lsl #12 800319a: f43f aefd beq.w 8002f98 <__aeabi_dmul+0x1f8> 800319e: 4610 mov r0, r2 80031a0: 4619 mov r1, r3 80031a2: e722 b.n 8002fea <__aeabi_dmul+0x24a> 80031a4: ea50 0641 orrs.w r6, r0, r1, lsl #1 80031a8: bf18 it ne 80031aa: ea52 0643 orrsne.w r6, r2, r3, lsl #1 80031ae: f47f aec5 bne.w 8002f3c <__aeabi_dmul+0x19c> 80031b2: ea50 0441 orrs.w r4, r0, r1, lsl #1 80031b6: f47f af0d bne.w 8002fd4 <__aeabi_dmul+0x234> 80031ba: ea52 0543 orrs.w r5, r2, r3, lsl #1 80031be: f47f aeeb bne.w 8002f98 <__aeabi_dmul+0x1f8> 80031c2: e712 b.n 8002fea <__aeabi_dmul+0x24a> 080031c4 <__gedf2>: 80031c4: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 80031c8: e006 b.n 80031d8 <__cmpdf2+0x4> 80031ca: bf00 nop 080031cc <__ledf2>: 80031cc: f04f 0c01 mov.w ip, #1 80031d0: e002 b.n 80031d8 <__cmpdf2+0x4> 80031d2: bf00 nop 080031d4 <__cmpdf2>: 80031d4: f04f 0c01 mov.w ip, #1 80031d8: f84d cd04 str.w ip, [sp, #-4]! 80031dc: ea4f 0c41 mov.w ip, r1, lsl #1 80031e0: ea7f 5c6c mvns.w ip, ip, asr #21 80031e4: ea4f 0c43 mov.w ip, r3, lsl #1 80031e8: bf18 it ne 80031ea: ea7f 5c6c mvnsne.w ip, ip, asr #21 80031ee: d01b beq.n 8003228 <__cmpdf2+0x54> 80031f0: b001 add sp, #4 80031f2: ea50 0c41 orrs.w ip, r0, r1, lsl #1 80031f6: bf0c ite eq 80031f8: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 80031fc: ea91 0f03 teqne r1, r3 8003200: bf02 ittt eq 8003202: ea90 0f02 teqeq r0, r2 8003206: 2000 moveq r0, #0 8003208: 4770 bxeq lr 800320a: f110 0f00 cmn.w r0, #0 800320e: ea91 0f03 teq r1, r3 8003212: bf58 it pl 8003214: 4299 cmppl r1, r3 8003216: bf08 it eq 8003218: 4290 cmpeq r0, r2 800321a: bf2c ite cs 800321c: 17d8 asrcs r0, r3, #31 800321e: ea6f 70e3 mvncc.w r0, r3, asr #31 8003222: f040 0001 orr.w r0, r0, #1 8003226: 4770 bx lr 8003228: ea4f 0c41 mov.w ip, r1, lsl #1 800322c: ea7f 5c6c mvns.w ip, ip, asr #21 8003230: d102 bne.n 8003238 <__cmpdf2+0x64> 8003232: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8003236: d107 bne.n 8003248 <__cmpdf2+0x74> 8003238: ea4f 0c43 mov.w ip, r3, lsl #1 800323c: ea7f 5c6c mvns.w ip, ip, asr #21 8003240: d1d6 bne.n 80031f0 <__cmpdf2+0x1c> 8003242: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8003246: d0d3 beq.n 80031f0 <__cmpdf2+0x1c> 8003248: f85d 0b04 ldr.w r0, [sp], #4 800324c: 4770 bx lr 800324e: bf00 nop 08003250 <__aeabi_cdrcmple>: 8003250: 4684 mov ip, r0 8003252: 4610 mov r0, r2 8003254: 4662 mov r2, ip 8003256: 468c mov ip, r1 8003258: 4619 mov r1, r3 800325a: 4663 mov r3, ip 800325c: e000 b.n 8003260 <__aeabi_cdcmpeq> 800325e: bf00 nop 08003260 <__aeabi_cdcmpeq>: 8003260: b501 push {r0, lr} 8003262: f7ff ffb7 bl 80031d4 <__cmpdf2> 8003266: 2800 cmp r0, #0 8003268: bf48 it mi 800326a: f110 0f00 cmnmi.w r0, #0 800326e: bd01 pop {r0, pc} 08003270 <__aeabi_dcmpeq>: 8003270: f84d ed08 str.w lr, [sp, #-8]! 8003274: f7ff fff4 bl 8003260 <__aeabi_cdcmpeq> 8003278: bf0c ite eq 800327a: 2001 moveq r0, #1 800327c: 2000 movne r0, #0 800327e: f85d fb08 ldr.w pc, [sp], #8 8003282: bf00 nop 08003284 <__aeabi_dcmplt>: 8003284: f84d ed08 str.w lr, [sp, #-8]! 8003288: f7ff ffea bl 8003260 <__aeabi_cdcmpeq> 800328c: bf34 ite cc 800328e: 2001 movcc r0, #1 8003290: 2000 movcs r0, #0 8003292: f85d fb08 ldr.w pc, [sp], #8 8003296: bf00 nop 08003298 <__aeabi_dcmple>: 8003298: f84d ed08 str.w lr, [sp, #-8]! 800329c: f7ff ffe0 bl 8003260 <__aeabi_cdcmpeq> 80032a0: bf94 ite ls 80032a2: 2001 movls r0, #1 80032a4: 2000 movhi r0, #0 80032a6: f85d fb08 ldr.w pc, [sp], #8 80032aa: bf00 nop 080032ac <__aeabi_dcmpge>: 80032ac: f84d ed08 str.w lr, [sp, #-8]! 80032b0: f7ff ffce bl 8003250 <__aeabi_cdrcmple> 80032b4: bf94 ite ls 80032b6: 2001 movls r0, #1 80032b8: 2000 movhi r0, #0 80032ba: f85d fb08 ldr.w pc, [sp], #8 80032be: bf00 nop 080032c0 <__aeabi_dcmpgt>: 80032c0: f84d ed08 str.w lr, [sp, #-8]! 80032c4: f7ff ffc4 bl 8003250 <__aeabi_cdrcmple> 80032c8: bf34 ite cc 80032ca: 2001 movcc r0, #1 80032cc: 2000 movcs r0, #0 80032ce: f85d fb08 ldr.w pc, [sp], #8 80032d2: bf00 nop 080032d4 <__aeabi_dcmpun>: 80032d4: ea4f 0c41 mov.w ip, r1, lsl #1 80032d8: ea7f 5c6c mvns.w ip, ip, asr #21 80032dc: d102 bne.n 80032e4 <__aeabi_dcmpun+0x10> 80032de: ea50 3c01 orrs.w ip, r0, r1, lsl #12 80032e2: d10a bne.n 80032fa <__aeabi_dcmpun+0x26> 80032e4: ea4f 0c43 mov.w ip, r3, lsl #1 80032e8: ea7f 5c6c mvns.w ip, ip, asr #21 80032ec: d102 bne.n 80032f4 <__aeabi_dcmpun+0x20> 80032ee: ea52 3c03 orrs.w ip, r2, r3, lsl #12 80032f2: d102 bne.n 80032fa <__aeabi_dcmpun+0x26> 80032f4: f04f 0000 mov.w r0, #0 80032f8: 4770 bx lr 80032fa: f04f 0001 mov.w r0, #1 80032fe: 4770 bx lr 08003300 <__aeabi_d2f>: 8003300: ea4f 0241 mov.w r2, r1, lsl #1 8003304: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8003308: bf24 itt cs 800330a: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 800330e: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8003312: d90d bls.n 8003330 <__aeabi_d2f+0x30> 8003314: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8003318: ea4f 02c0 mov.w r2, r0, lsl #3 800331c: ea4c 7050 orr.w r0, ip, r0, lsr #29 8003320: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8003324: eb40 0083 adc.w r0, r0, r3, lsl #2 8003328: bf08 it eq 800332a: f020 0001 biceq.w r0, r0, #1 800332e: 4770 bx lr 8003330: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8003334: d121 bne.n 800337a <__aeabi_d2f+0x7a> 8003336: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 800333a: bfbc itt lt 800333c: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8003340: 4770 bxlt lr 8003342: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8003346: ea4f 5252 mov.w r2, r2, lsr #21 800334a: f1c2 0218 rsb r2, r2, #24 800334e: f1c2 0c20 rsb ip, r2, #32 8003352: fa10 f30c lsls.w r3, r0, ip 8003356: fa20 f002 lsr.w r0, r0, r2 800335a: bf18 it ne 800335c: f040 0001 orrne.w r0, r0, #1 8003360: ea4f 23c1 mov.w r3, r1, lsl #11 8003364: ea4f 23d3 mov.w r3, r3, lsr #11 8003368: fa03 fc0c lsl.w ip, r3, ip 800336c: ea40 000c orr.w r0, r0, ip 8003370: fa23 f302 lsr.w r3, r3, r2 8003374: ea4f 0343 mov.w r3, r3, lsl #1 8003378: e7cc b.n 8003314 <__aeabi_d2f+0x14> 800337a: ea7f 5362 mvns.w r3, r2, asr #21 800337e: d107 bne.n 8003390 <__aeabi_d2f+0x90> 8003380: ea50 3301 orrs.w r3, r0, r1, lsl #12 8003384: bf1e ittt ne 8003386: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 800338a: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 800338e: 4770 bxne lr 8003390: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8003394: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8003398: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 800339c: 4770 bx lr 800339e: bf00 nop 080033a0 <__aeabi_frsub>: 80033a0: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 80033a4: e002 b.n 80033ac <__addsf3> 80033a6: bf00 nop 080033a8 <__aeabi_fsub>: 80033a8: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 080033ac <__addsf3>: 80033ac: 0042 lsls r2, r0, #1 80033ae: bf1f itttt ne 80033b0: ea5f 0341 movsne.w r3, r1, lsl #1 80033b4: ea92 0f03 teqne r2, r3 80033b8: ea7f 6c22 mvnsne.w ip, r2, asr #24 80033bc: ea7f 6c23 mvnsne.w ip, r3, asr #24 80033c0: d06a beq.n 8003498 <__addsf3+0xec> 80033c2: ea4f 6212 mov.w r2, r2, lsr #24 80033c6: ebd2 6313 rsbs r3, r2, r3, lsr #24 80033ca: bfc1 itttt gt 80033cc: 18d2 addgt r2, r2, r3 80033ce: 4041 eorgt r1, r0 80033d0: 4048 eorgt r0, r1 80033d2: 4041 eorgt r1, r0 80033d4: bfb8 it lt 80033d6: 425b neglt r3, r3 80033d8: 2b19 cmp r3, #25 80033da: bf88 it hi 80033dc: 4770 bxhi lr 80033de: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 80033e2: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 80033e6: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 80033ea: bf18 it ne 80033ec: 4240 negne r0, r0 80033ee: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 80033f2: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 80033f6: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 80033fa: bf18 it ne 80033fc: 4249 negne r1, r1 80033fe: ea92 0f03 teq r2, r3 8003402: d03f beq.n 8003484 <__addsf3+0xd8> 8003404: f1a2 0201 sub.w r2, r2, #1 8003408: fa41 fc03 asr.w ip, r1, r3 800340c: eb10 000c adds.w r0, r0, ip 8003410: f1c3 0320 rsb r3, r3, #32 8003414: fa01 f103 lsl.w r1, r1, r3 8003418: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 800341c: d502 bpl.n 8003424 <__addsf3+0x78> 800341e: 4249 negs r1, r1 8003420: eb60 0040 sbc.w r0, r0, r0, lsl #1 8003424: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 8003428: d313 bcc.n 8003452 <__addsf3+0xa6> 800342a: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 800342e: d306 bcc.n 800343e <__addsf3+0x92> 8003430: 0840 lsrs r0, r0, #1 8003432: ea4f 0131 mov.w r1, r1, rrx 8003436: f102 0201 add.w r2, r2, #1 800343a: 2afe cmp r2, #254 @ 0xfe 800343c: d251 bcs.n 80034e2 <__addsf3+0x136> 800343e: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 8003442: eb40 50c2 adc.w r0, r0, r2, lsl #23 8003446: bf08 it eq 8003448: f020 0001 biceq.w r0, r0, #1 800344c: ea40 0003 orr.w r0, r0, r3 8003450: 4770 bx lr 8003452: 0049 lsls r1, r1, #1 8003454: eb40 0000 adc.w r0, r0, r0 8003458: 3a01 subs r2, #1 800345a: bf28 it cs 800345c: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 8003460: d2ed bcs.n 800343e <__addsf3+0x92> 8003462: fab0 fc80 clz ip, r0 8003466: f1ac 0c08 sub.w ip, ip, #8 800346a: ebb2 020c subs.w r2, r2, ip 800346e: fa00 f00c lsl.w r0, r0, ip 8003472: bfaa itet ge 8003474: eb00 50c2 addge.w r0, r0, r2, lsl #23 8003478: 4252 neglt r2, r2 800347a: 4318 orrge r0, r3 800347c: bfbc itt lt 800347e: 40d0 lsrlt r0, r2 8003480: 4318 orrlt r0, r3 8003482: 4770 bx lr 8003484: f092 0f00 teq r2, #0 8003488: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 800348c: bf06 itte eq 800348e: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 8003492: 3201 addeq r2, #1 8003494: 3b01 subne r3, #1 8003496: e7b5 b.n 8003404 <__addsf3+0x58> 8003498: ea4f 0341 mov.w r3, r1, lsl #1 800349c: ea7f 6c22 mvns.w ip, r2, asr #24 80034a0: bf18 it ne 80034a2: ea7f 6c23 mvnsne.w ip, r3, asr #24 80034a6: d021 beq.n 80034ec <__addsf3+0x140> 80034a8: ea92 0f03 teq r2, r3 80034ac: d004 beq.n 80034b8 <__addsf3+0x10c> 80034ae: f092 0f00 teq r2, #0 80034b2: bf08 it eq 80034b4: 4608 moveq r0, r1 80034b6: 4770 bx lr 80034b8: ea90 0f01 teq r0, r1 80034bc: bf1c itt ne 80034be: 2000 movne r0, #0 80034c0: 4770 bxne lr 80034c2: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 80034c6: d104 bne.n 80034d2 <__addsf3+0x126> 80034c8: 0040 lsls r0, r0, #1 80034ca: bf28 it cs 80034cc: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 80034d0: 4770 bx lr 80034d2: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 80034d6: bf3c itt cc 80034d8: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 80034dc: 4770 bxcc lr 80034de: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 80034e2: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 80034e6: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 80034ea: 4770 bx lr 80034ec: ea7f 6222 mvns.w r2, r2, asr #24 80034f0: bf16 itet ne 80034f2: 4608 movne r0, r1 80034f4: ea7f 6323 mvnseq.w r3, r3, asr #24 80034f8: 4601 movne r1, r0 80034fa: 0242 lsls r2, r0, #9 80034fc: bf06 itte eq 80034fe: ea5f 2341 movseq.w r3, r1, lsl #9 8003502: ea90 0f01 teqeq r0, r1 8003506: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 800350a: 4770 bx lr 0800350c <__aeabi_ui2f>: 800350c: f04f 0300 mov.w r3, #0 8003510: e004 b.n 800351c <__aeabi_i2f+0x8> 8003512: bf00 nop 08003514 <__aeabi_i2f>: 8003514: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 8003518: bf48 it mi 800351a: 4240 negmi r0, r0 800351c: ea5f 0c00 movs.w ip, r0 8003520: bf08 it eq 8003522: 4770 bxeq lr 8003524: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 8003528: 4601 mov r1, r0 800352a: f04f 0000 mov.w r0, #0 800352e: e01c b.n 800356a <__aeabi_l2f+0x2a> 08003530 <__aeabi_ul2f>: 8003530: ea50 0201 orrs.w r2, r0, r1 8003534: bf08 it eq 8003536: 4770 bxeq lr 8003538: f04f 0300 mov.w r3, #0 800353c: e00a b.n 8003554 <__aeabi_l2f+0x14> 800353e: bf00 nop 08003540 <__aeabi_l2f>: 8003540: ea50 0201 orrs.w r2, r0, r1 8003544: bf08 it eq 8003546: 4770 bxeq lr 8003548: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 800354c: d502 bpl.n 8003554 <__aeabi_l2f+0x14> 800354e: 4240 negs r0, r0 8003550: eb61 0141 sbc.w r1, r1, r1, lsl #1 8003554: ea5f 0c01 movs.w ip, r1 8003558: bf02 ittt eq 800355a: 4684 moveq ip, r0 800355c: 4601 moveq r1, r0 800355e: 2000 moveq r0, #0 8003560: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8003564: bf08 it eq 8003566: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 800356a: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 800356e: fabc f28c clz r2, ip 8003572: 3a08 subs r2, #8 8003574: eba3 53c2 sub.w r3, r3, r2, lsl #23 8003578: db10 blt.n 800359c <__aeabi_l2f+0x5c> 800357a: fa01 fc02 lsl.w ip, r1, r2 800357e: 4463 add r3, ip 8003580: fa00 fc02 lsl.w ip, r0, r2 8003584: f1c2 0220 rsb r2, r2, #32 8003588: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 800358c: fa20 f202 lsr.w r2, r0, r2 8003590: eb43 0002 adc.w r0, r3, r2 8003594: bf08 it eq 8003596: f020 0001 biceq.w r0, r0, #1 800359a: 4770 bx lr 800359c: f102 0220 add.w r2, r2, #32 80035a0: fa01 fc02 lsl.w ip, r1, r2 80035a4: f1c2 0220 rsb r2, r2, #32 80035a8: ea50 004c orrs.w r0, r0, ip, lsl #1 80035ac: fa21 f202 lsr.w r2, r1, r2 80035b0: eb43 0002 adc.w r0, r3, r2 80035b4: bf08 it eq 80035b6: ea20 70dc biceq.w r0, r0, ip, lsr #31 80035ba: 4770 bx lr 080035bc <__aeabi_fmul>: 80035bc: f04f 0cff mov.w ip, #255 @ 0xff 80035c0: ea1c 52d0 ands.w r2, ip, r0, lsr #23 80035c4: bf1e ittt ne 80035c6: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 80035ca: ea92 0f0c teqne r2, ip 80035ce: ea93 0f0c teqne r3, ip 80035d2: d06f beq.n 80036b4 <__aeabi_fmul+0xf8> 80035d4: 441a add r2, r3 80035d6: ea80 0c01 eor.w ip, r0, r1 80035da: 0240 lsls r0, r0, #9 80035dc: bf18 it ne 80035de: ea5f 2141 movsne.w r1, r1, lsl #9 80035e2: d01e beq.n 8003622 <__aeabi_fmul+0x66> 80035e4: f04f 6300 mov.w r3, #134217728 @ 0x8000000 80035e8: ea43 1050 orr.w r0, r3, r0, lsr #5 80035ec: ea43 1151 orr.w r1, r3, r1, lsr #5 80035f0: fba0 3101 umull r3, r1, r0, r1 80035f4: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 80035f8: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 80035fc: bf3e ittt cc 80035fe: 0049 lslcc r1, r1, #1 8003600: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 8003604: 005b lslcc r3, r3, #1 8003606: ea40 0001 orr.w r0, r0, r1 800360a: f162 027f sbc.w r2, r2, #127 @ 0x7f 800360e: 2afd cmp r2, #253 @ 0xfd 8003610: d81d bhi.n 800364e <__aeabi_fmul+0x92> 8003612: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8003616: eb40 50c2 adc.w r0, r0, r2, lsl #23 800361a: bf08 it eq 800361c: f020 0001 biceq.w r0, r0, #1 8003620: 4770 bx lr 8003622: f090 0f00 teq r0, #0 8003626: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 800362a: bf08 it eq 800362c: 0249 lsleq r1, r1, #9 800362e: ea4c 2050 orr.w r0, ip, r0, lsr #9 8003632: ea40 2051 orr.w r0, r0, r1, lsr #9 8003636: 3a7f subs r2, #127 @ 0x7f 8003638: bfc2 ittt gt 800363a: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 800363e: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 8003642: 4770 bxgt lr 8003644: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8003648: f04f 0300 mov.w r3, #0 800364c: 3a01 subs r2, #1 800364e: dc5d bgt.n 800370c <__aeabi_fmul+0x150> 8003650: f112 0f19 cmn.w r2, #25 8003654: bfdc itt le 8003656: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 800365a: 4770 bxle lr 800365c: f1c2 0200 rsb r2, r2, #0 8003660: 0041 lsls r1, r0, #1 8003662: fa21 f102 lsr.w r1, r1, r2 8003666: f1c2 0220 rsb r2, r2, #32 800366a: fa00 fc02 lsl.w ip, r0, r2 800366e: ea5f 0031 movs.w r0, r1, rrx 8003672: f140 0000 adc.w r0, r0, #0 8003676: ea53 034c orrs.w r3, r3, ip, lsl #1 800367a: bf08 it eq 800367c: ea20 70dc biceq.w r0, r0, ip, lsr #31 8003680: 4770 bx lr 8003682: f092 0f00 teq r2, #0 8003686: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 800368a: bf02 ittt eq 800368c: 0040 lsleq r0, r0, #1 800368e: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 8003692: 3a01 subeq r2, #1 8003694: d0f9 beq.n 800368a <__aeabi_fmul+0xce> 8003696: ea40 000c orr.w r0, r0, ip 800369a: f093 0f00 teq r3, #0 800369e: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 80036a2: bf02 ittt eq 80036a4: 0049 lsleq r1, r1, #1 80036a6: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 80036aa: 3b01 subeq r3, #1 80036ac: d0f9 beq.n 80036a2 <__aeabi_fmul+0xe6> 80036ae: ea41 010c orr.w r1, r1, ip 80036b2: e78f b.n 80035d4 <__aeabi_fmul+0x18> 80036b4: ea0c 53d1 and.w r3, ip, r1, lsr #23 80036b8: ea92 0f0c teq r2, ip 80036bc: bf18 it ne 80036be: ea93 0f0c teqne r3, ip 80036c2: d00a beq.n 80036da <__aeabi_fmul+0x11e> 80036c4: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 80036c8: bf18 it ne 80036ca: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 80036ce: d1d8 bne.n 8003682 <__aeabi_fmul+0xc6> 80036d0: ea80 0001 eor.w r0, r0, r1 80036d4: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 80036d8: 4770 bx lr 80036da: f090 0f00 teq r0, #0 80036de: bf17 itett ne 80036e0: f090 4f00 teqne r0, #2147483648 @ 0x80000000 80036e4: 4608 moveq r0, r1 80036e6: f091 0f00 teqne r1, #0 80036ea: f091 4f00 teqne r1, #2147483648 @ 0x80000000 80036ee: d014 beq.n 800371a <__aeabi_fmul+0x15e> 80036f0: ea92 0f0c teq r2, ip 80036f4: d101 bne.n 80036fa <__aeabi_fmul+0x13e> 80036f6: 0242 lsls r2, r0, #9 80036f8: d10f bne.n 800371a <__aeabi_fmul+0x15e> 80036fa: ea93 0f0c teq r3, ip 80036fe: d103 bne.n 8003708 <__aeabi_fmul+0x14c> 8003700: 024b lsls r3, r1, #9 8003702: bf18 it ne 8003704: 4608 movne r0, r1 8003706: d108 bne.n 800371a <__aeabi_fmul+0x15e> 8003708: ea80 0001 eor.w r0, r0, r1 800370c: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 8003710: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8003714: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8003718: 4770 bx lr 800371a: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 800371e: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 8003722: 4770 bx lr 08003724 <__aeabi_fdiv>: 8003724: f04f 0cff mov.w ip, #255 @ 0xff 8003728: ea1c 52d0 ands.w r2, ip, r0, lsr #23 800372c: bf1e ittt ne 800372e: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 8003732: ea92 0f0c teqne r2, ip 8003736: ea93 0f0c teqne r3, ip 800373a: d069 beq.n 8003810 <__aeabi_fdiv+0xec> 800373c: eba2 0203 sub.w r2, r2, r3 8003740: ea80 0c01 eor.w ip, r0, r1 8003744: 0249 lsls r1, r1, #9 8003746: ea4f 2040 mov.w r0, r0, lsl #9 800374a: d037 beq.n 80037bc <__aeabi_fdiv+0x98> 800374c: f04f 5380 mov.w r3, #268435456 @ 0x10000000 8003750: ea43 1111 orr.w r1, r3, r1, lsr #4 8003754: ea43 1310 orr.w r3, r3, r0, lsr #4 8003758: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 800375c: 428b cmp r3, r1 800375e: bf38 it cc 8003760: 005b lslcc r3, r3, #1 8003762: f142 027d adc.w r2, r2, #125 @ 0x7d 8003766: f44f 0c00 mov.w ip, #8388608 @ 0x800000 800376a: 428b cmp r3, r1 800376c: bf24 itt cs 800376e: 1a5b subcs r3, r3, r1 8003770: ea40 000c orrcs.w r0, r0, ip 8003774: ebb3 0f51 cmp.w r3, r1, lsr #1 8003778: bf24 itt cs 800377a: eba3 0351 subcs.w r3, r3, r1, lsr #1 800377e: ea40 005c orrcs.w r0, r0, ip, lsr #1 8003782: ebb3 0f91 cmp.w r3, r1, lsr #2 8003786: bf24 itt cs 8003788: eba3 0391 subcs.w r3, r3, r1, lsr #2 800378c: ea40 009c orrcs.w r0, r0, ip, lsr #2 8003790: ebb3 0fd1 cmp.w r3, r1, lsr #3 8003794: bf24 itt cs 8003796: eba3 03d1 subcs.w r3, r3, r1, lsr #3 800379a: ea40 00dc orrcs.w r0, r0, ip, lsr #3 800379e: 011b lsls r3, r3, #4 80037a0: bf18 it ne 80037a2: ea5f 1c1c movsne.w ip, ip, lsr #4 80037a6: d1e0 bne.n 800376a <__aeabi_fdiv+0x46> 80037a8: 2afd cmp r2, #253 @ 0xfd 80037aa: f63f af50 bhi.w 800364e <__aeabi_fmul+0x92> 80037ae: 428b cmp r3, r1 80037b0: eb40 50c2 adc.w r0, r0, r2, lsl #23 80037b4: bf08 it eq 80037b6: f020 0001 biceq.w r0, r0, #1 80037ba: 4770 bx lr 80037bc: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 80037c0: ea4c 2050 orr.w r0, ip, r0, lsr #9 80037c4: 327f adds r2, #127 @ 0x7f 80037c6: bfc2 ittt gt 80037c8: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff 80037cc: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 80037d0: 4770 bxgt lr 80037d2: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 80037d6: f04f 0300 mov.w r3, #0 80037da: 3a01 subs r2, #1 80037dc: e737 b.n 800364e <__aeabi_fmul+0x92> 80037de: f092 0f00 teq r2, #0 80037e2: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 80037e6: bf02 ittt eq 80037e8: 0040 lsleq r0, r0, #1 80037ea: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 80037ee: 3a01 subeq r2, #1 80037f0: d0f9 beq.n 80037e6 <__aeabi_fdiv+0xc2> 80037f2: ea40 000c orr.w r0, r0, ip 80037f6: f093 0f00 teq r3, #0 80037fa: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 80037fe: bf02 ittt eq 8003800: 0049 lsleq r1, r1, #1 8003802: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 8003806: 3b01 subeq r3, #1 8003808: d0f9 beq.n 80037fe <__aeabi_fdiv+0xda> 800380a: ea41 010c orr.w r1, r1, ip 800380e: e795 b.n 800373c <__aeabi_fdiv+0x18> 8003810: ea0c 53d1 and.w r3, ip, r1, lsr #23 8003814: ea92 0f0c teq r2, ip 8003818: d108 bne.n 800382c <__aeabi_fdiv+0x108> 800381a: 0242 lsls r2, r0, #9 800381c: f47f af7d bne.w 800371a <__aeabi_fmul+0x15e> 8003820: ea93 0f0c teq r3, ip 8003824: f47f af70 bne.w 8003708 <__aeabi_fmul+0x14c> 8003828: 4608 mov r0, r1 800382a: e776 b.n 800371a <__aeabi_fmul+0x15e> 800382c: ea93 0f0c teq r3, ip 8003830: d104 bne.n 800383c <__aeabi_fdiv+0x118> 8003832: 024b lsls r3, r1, #9 8003834: f43f af4c beq.w 80036d0 <__aeabi_fmul+0x114> 8003838: 4608 mov r0, r1 800383a: e76e b.n 800371a <__aeabi_fmul+0x15e> 800383c: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 8003840: bf18 it ne 8003842: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 8003846: d1ca bne.n 80037de <__aeabi_fdiv+0xba> 8003848: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 800384c: f47f af5c bne.w 8003708 <__aeabi_fmul+0x14c> 8003850: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 8003854: f47f af3c bne.w 80036d0 <__aeabi_fmul+0x114> 8003858: e75f b.n 800371a <__aeabi_fmul+0x15e> 800385a: bf00 nop 0800385c <__gesf2>: 800385c: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 8003860: e006 b.n 8003870 <__cmpsf2+0x4> 8003862: bf00 nop 08003864 <__lesf2>: 8003864: f04f 0c01 mov.w ip, #1 8003868: e002 b.n 8003870 <__cmpsf2+0x4> 800386a: bf00 nop 0800386c <__cmpsf2>: 800386c: f04f 0c01 mov.w ip, #1 8003870: f84d cd04 str.w ip, [sp, #-4]! 8003874: ea4f 0240 mov.w r2, r0, lsl #1 8003878: ea4f 0341 mov.w r3, r1, lsl #1 800387c: ea7f 6c22 mvns.w ip, r2, asr #24 8003880: bf18 it ne 8003882: ea7f 6c23 mvnsne.w ip, r3, asr #24 8003886: d011 beq.n 80038ac <__cmpsf2+0x40> 8003888: b001 add sp, #4 800388a: ea52 0c53 orrs.w ip, r2, r3, lsr #1 800388e: bf18 it ne 8003890: ea90 0f01 teqne r0, r1 8003894: bf58 it pl 8003896: ebb2 0003 subspl.w r0, r2, r3 800389a: bf88 it hi 800389c: 17c8 asrhi r0, r1, #31 800389e: bf38 it cc 80038a0: ea6f 70e1 mvncc.w r0, r1, asr #31 80038a4: bf18 it ne 80038a6: f040 0001 orrne.w r0, r0, #1 80038aa: 4770 bx lr 80038ac: ea7f 6c22 mvns.w ip, r2, asr #24 80038b0: d102 bne.n 80038b8 <__cmpsf2+0x4c> 80038b2: ea5f 2c40 movs.w ip, r0, lsl #9 80038b6: d105 bne.n 80038c4 <__cmpsf2+0x58> 80038b8: ea7f 6c23 mvns.w ip, r3, asr #24 80038bc: d1e4 bne.n 8003888 <__cmpsf2+0x1c> 80038be: ea5f 2c41 movs.w ip, r1, lsl #9 80038c2: d0e1 beq.n 8003888 <__cmpsf2+0x1c> 80038c4: f85d 0b04 ldr.w r0, [sp], #4 80038c8: 4770 bx lr 80038ca: bf00 nop 080038cc <__aeabi_cfrcmple>: 80038cc: 4684 mov ip, r0 80038ce: 4608 mov r0, r1 80038d0: 4661 mov r1, ip 80038d2: e7ff b.n 80038d4 <__aeabi_cfcmpeq> 080038d4 <__aeabi_cfcmpeq>: 80038d4: b50f push {r0, r1, r2, r3, lr} 80038d6: f7ff ffc9 bl 800386c <__cmpsf2> 80038da: 2800 cmp r0, #0 80038dc: bf48 it mi 80038de: f110 0f00 cmnmi.w r0, #0 80038e2: bd0f pop {r0, r1, r2, r3, pc} 080038e4 <__aeabi_fcmpeq>: 80038e4: f84d ed08 str.w lr, [sp, #-8]! 80038e8: f7ff fff4 bl 80038d4 <__aeabi_cfcmpeq> 80038ec: bf0c ite eq 80038ee: 2001 moveq r0, #1 80038f0: 2000 movne r0, #0 80038f2: f85d fb08 ldr.w pc, [sp], #8 80038f6: bf00 nop 080038f8 <__aeabi_fcmplt>: 80038f8: f84d ed08 str.w lr, [sp, #-8]! 80038fc: f7ff ffea bl 80038d4 <__aeabi_cfcmpeq> 8003900: bf34 ite cc 8003902: 2001 movcc r0, #1 8003904: 2000 movcs r0, #0 8003906: f85d fb08 ldr.w pc, [sp], #8 800390a: bf00 nop 0800390c <__aeabi_fcmple>: 800390c: f84d ed08 str.w lr, [sp, #-8]! 8003910: f7ff ffe0 bl 80038d4 <__aeabi_cfcmpeq> 8003914: bf94 ite ls 8003916: 2001 movls r0, #1 8003918: 2000 movhi r0, #0 800391a: f85d fb08 ldr.w pc, [sp], #8 800391e: bf00 nop 08003920 <__aeabi_fcmpge>: 8003920: f84d ed08 str.w lr, [sp, #-8]! 8003924: f7ff ffd2 bl 80038cc <__aeabi_cfrcmple> 8003928: bf94 ite ls 800392a: 2001 movls r0, #1 800392c: 2000 movhi r0, #0 800392e: f85d fb08 ldr.w pc, [sp], #8 8003932: bf00 nop 08003934 <__aeabi_fcmpgt>: 8003934: f84d ed08 str.w lr, [sp, #-8]! 8003938: f7ff ffc8 bl 80038cc <__aeabi_cfrcmple> 800393c: bf34 ite cc 800393e: 2001 movcc r0, #1 8003940: 2000 movcs r0, #0 8003942: f85d fb08 ldr.w pc, [sp], #8 8003946: bf00 nop 08003948 <__aeabi_f2iz>: 8003948: ea4f 0240 mov.w r2, r0, lsl #1 800394c: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 8003950: d30f bcc.n 8003972 <__aeabi_f2iz+0x2a> 8003952: f04f 039e mov.w r3, #158 @ 0x9e 8003956: ebb3 6212 subs.w r2, r3, r2, lsr #24 800395a: d90d bls.n 8003978 <__aeabi_f2iz+0x30> 800395c: ea4f 2300 mov.w r3, r0, lsl #8 8003960: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8003964: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 8003968: fa23 f002 lsr.w r0, r3, r2 800396c: bf18 it ne 800396e: 4240 negne r0, r0 8003970: 4770 bx lr 8003972: f04f 0000 mov.w r0, #0 8003976: 4770 bx lr 8003978: f112 0f61 cmn.w r2, #97 @ 0x61 800397c: d101 bne.n 8003982 <__aeabi_f2iz+0x3a> 800397e: 0242 lsls r2, r0, #9 8003980: d105 bne.n 800398e <__aeabi_f2iz+0x46> 8003982: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 8003986: bf08 it eq 8003988: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 800398c: 4770 bx lr 800398e: f04f 0000 mov.w r0, #0 8003992: 4770 bx lr 08003994 <__aeabi_f2uiz>: 8003994: 0042 lsls r2, r0, #1 8003996: d20e bcs.n 80039b6 <__aeabi_f2uiz+0x22> 8003998: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 800399c: d30b bcc.n 80039b6 <__aeabi_f2uiz+0x22> 800399e: f04f 039e mov.w r3, #158 @ 0x9e 80039a2: ebb3 6212 subs.w r2, r3, r2, lsr #24 80039a6: d409 bmi.n 80039bc <__aeabi_f2uiz+0x28> 80039a8: ea4f 2300 mov.w r3, r0, lsl #8 80039ac: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80039b0: fa23 f002 lsr.w r0, r3, r2 80039b4: 4770 bx lr 80039b6: f04f 0000 mov.w r0, #0 80039ba: 4770 bx lr 80039bc: f112 0f61 cmn.w r2, #97 @ 0x61 80039c0: d101 bne.n 80039c6 <__aeabi_f2uiz+0x32> 80039c2: 0242 lsls r2, r0, #9 80039c4: d102 bne.n 80039cc <__aeabi_f2uiz+0x38> 80039c6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80039ca: 4770 bx lr 80039cc: f04f 0000 mov.w r0, #0 80039d0: 4770 bx lr 80039d2: bf00 nop 080039d4 <__errno>: 80039d4: 4b01 ldr r3, [pc, #4] @ (80039dc <__errno+0x8>) 80039d6: 6818 ldr r0, [r3, #0] 80039d8: 4770 bx lr 80039da: bf00 nop 80039dc: 200000b8 .word 0x200000b8